控制邏輯電路 的英文怎麼說

中文拼音 [kòngzhìluódiànlù]
控制邏輯電路 英文
control logic circuit
  • 控 : 動詞1 （告發;控告） accuse; charge 2 （控制） control; dominate 3 （使容器口兒朝下 讓裏面的液體慢...
  • 制 : Ⅰ動詞1 （製造） make; manufacture 2 （擬訂; 規定） draw up; establish 3 （用強力約束; 限定; 管束...
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 控制 : control; dominate; regulate; govern; manage; check; cybernate; manipulate; encraty; rule; rein; c...
  • 邏輯 : logic
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. The chip simulation network laboratory system this paper disguessed is a distribute network simulation system based on lan. the system ' s architecture is a c / s of three lays. the front platform are the chip simulation network system application program terminer ; the middle lay is a dcom server, it ' s duty is to deal with the communication and data transmission between the terminer and then database server, and to execute the logical operation. the application program just connect with the middle lay and get data from it, the connection and operation with database server will be managed by the dcom server. the duty of database server is to access and backup the final data

    具體是由位於網路各個終端的晶元模擬網路實驗系統應用程序為前臺；中間層為dcom應用程序服務器，負責處理前臺應用程序與后臺數據庫的通信和數據傳輸，並執行業務邏輯，前臺應用程序只需要與應用程序服務器建立連接，在中間層操作數據即可，與后臺數據庫的連接和操作由應用程序服務器來統一管理操作。后臺數據庫只負責數據的存取操作。本論文實施的晶元模擬網路實驗系統模擬了主要的邏輯電路器件， 8088cpu ，存儲器，寄存器，數據總線，地址總線和控制總線，及其它相關晶元。
  2. Control logic circuit

    控制邏輯電路
  3. The unit shall be equipped with control logic that shuts down all electricity to the heating elements in the event of no water or low water levels in the tank

    這種熱水器應該配置控制邏輯電路，當出現無水或水位太低狀況時，能夠自動關閉加熱元件的電源。
  4. Therefore, it can be named by “ the specific demultiplexer of sdh ”. the design of pos line card was discussed and we also have finished the control logic of the hardware platform of the specific demultiplexer

    論文主要討論專用分接器的pos線卡設計和硬體平臺的控制邏輯電路設計與實現。論文首先對基於fpga的10gbps的pos線卡的設計方案進行了研究。
  5. The ina128 is used by left leg ' s driver circle and the aims are to enhance the cmrr and reduce the disturbance of 50hz. the part of a / d transmitting chip is the adc0809 which have a eight - channel transmitter, a eight - bit a / d transmitter and the logical control by microprocessor

    考慮到家庭監護的實際應用，精度的要求不是很高， a / d轉換器採用的是adc0809 ，它有8通道多路轉換器、 8位模/數轉換器和與微處理器兼容的控制邏輯電路。
  6. First, based on the analysis of the design method of two - valued shift counter, we use the multivaled circuit ' s property of high information density to put forward the design method of three - valued shift counter. by using this method module - n three - valued shift counter can be designed. and by selecting the best design method, the simplest circuit of control logic can be made

    首先，在分析二值的移位計數器的設計方法的基礎上，利用多值電路的高信息密度，提出了三值移位計數器的設計，運用該方法可以設計任意狀態的三值移位計數器，並且通過選擇最佳設計方案使控制邏輯電路最簡。
  7. The reactive power compensation is an important engineering in the power system. the active reactive power compensator designed in this text takes the instantaneous reactive power theory of three - phase as foundation, and is formed by the reactive current testing circuit, current tracking control circuit and the main circuit, and among them the current tracking control circuit is formed by instruction current arithmetic circuit, current polarity checkout circuit and current tracking control logic circuit three parts in the circuit form

    無功功率補償是電力系統中的一項重要工程，本文所設計的有源無功功率補償器是以三相瞬時無功功率理論為基礎的，它由無功電流檢測電路、電流跟蹤控制電路和主電路三大部分組成，其中電流跟蹤控制電路由指令電流運算電路、電流極性檢測電路和電流跟蹤控制邏輯電路三部分構成。
  8. The thesis offers apd signal amplify circuit chart and controlling time - series logic circuit principle chart bearing practical applied value

    給出了apd信號放大電路和控制時序邏輯電路原理圖。
  9. It is easier for us to realize the hardwave circuit, and the content of sine wave at least by 45db is the projecting advantages

    本文主要論述一種實用的時序邏輯電路的設計與實現設計一個十字路口交通燈自動循環亮滅的控制器。
  10. The thesis analyses the problems on the noise of apd photoelectric receiving system. author designs apd laser signal receiving system circuits, front amplify circuit, controlling time - series logic circuits, dc / dc transform circuits. and takes apd bias voltage fuzzy control

    分析了apd光電接收系統的噪聲問題，並對apd激光信號接收系統電路、前置放大電路、控制時序邏輯電路、 dc / dc變換電路進行了設計，採取了apd偏壓模糊控制。
  11. Therefore it comes true the on - line adjusting, real - time control and so on. it sames as real locale. the software of logic protect ( include electric logic ) and control includes some usual algebraic and operation model of thermal control and logic operation of logic protect. it adopts foxboro ' s dcs as a example, so we configuration via filling table, user only define i / o condition, fill certain operation variable, and name logic variable. the software offers a friendly user ' s interface, personnel can compile and modify the control and logic program, change the value of logic and control variable conveniently, attach themselves to run, debug and control the set, not need to know about the inside of the old programs deeply. so the configuration software offer a flat that control engineer can attend to the structure of control loop and logic protect ( include electric logic ), not but to handle complicated program

    它以foxboro的dcs控制系統為主要參考模式，採用填表的方式進行控制組態，用戶只需定義i / o條件、填寫具體的運算變量名、邏輯變量名即可。本軟體為建模人員提供了一個友好的用戶界面，使建模人員在建模時不必對模塊內部的控制、邏輯程序有很深的了解就可以方便的對其進行編寫和修改，實時改變各邏輯和控制變量在數據庫里的值，參與運行和調試，從而實現對機組的控制。因此，本組態軟體提供的這樣一個平臺，讓控制工程師能集中精力于控制迴路及邏輯保護（包含電氣邏輯）的構成，而不必拘泥於一些具體而煩瑣的程序操作。
  12. Finally the module is accomplished successfully after installation and debugging. it mainly consists of the minimum system of dsp, a / d conversion circuit, cpld control logic, watchdog circuit, op amplifier and filter circuit

    該模塊主要由數字信號處理器最小系統、模數轉換電路、復雜可編程邏輯器件控制邏輯、看門狗電路、運算放大器電路和模擬濾波器電路構成。
  13. To reduce the size and increase the reliability of the control card, lattice company ? isplsi chip is used to realize the digital logic circuit. its insystem programmable ability makes it easy to realize the design of digital logic circuit

    6軸伺服控制卡上，使用lattice公司的isplsi器件實現數字邏輯電路設計，降低了板卡的設計尺寸，增加了電路板的可靠性和設計靈活性。
  14. 1. a small and cheap 8 - bit microcontroller is used as control core. all components of the sensor, some of which are necessary for the multiple and intelligent functions, are selected ones with low cost and small package. by designing all auxiliary logic circuits in a complex programmable logic device ( cpld ), and integrating all analog circuits in an application specific ic ( asic ), the size of pcb board is greatly reduced, which make it possible that the pcb can be installed with the displacement detector together

    系統採用小型廉價8位微控制器控制，電路內配置了為實現多功能智能化所必需的硬體，並全部採用低價格、小體積器件，還將所有輔助邏輯電路設計在一片復雜可編程邏輯器件cpld內，所有模擬電路集成於一片專用集成電路asic內，大大縮小了電路板尺寸，再與傳感元件組裝在一起，從而使整個系統在保證智能化功能的前提下，具有體積小、成本低、一體化和抗干擾能力強的特點。
  15. In this paper we discuss mca circuit, the sequential logic for mca data collection, for the setting of the uld, lld and the gain of pga, as well as the combinational logic for decoding circuits of the computer interface, based on cpld

    本文詳細論述了利用cpld實現的脈沖幅度多道電路及其數據採集的時序控制邏輯、閾值設定和程式控制放大倍數設定的時序控制邏四川大學碩士學位論文輯、以及與計算機介面的譯碼電路等組合控制邏輯。
  16. A novel resonant pole zvt three - phase pwm inverter circuit for three - phase ac motor driving is presented. the proposed circuit has the feature of being more flexible with three inverter arms in zvt process. using only one resonant inductance, the inverter can not only reduce the power loss of inductance but also avoid possibility of unbalance in motor ' s three stator windings

    提出了一種針對三相交流電機驅動的新型諧振極零電壓過渡三相pwm逆變器電路，該電路中三個逆變橋臂的零電壓過渡更具有靈活性，僅使用一個諧振電感，既減少了電感損耗又防止了電機三相定子繞組可能存在的不平衡問題，並且諧振電感中殘余能量能夠回饋給電源；新型逆變器的輔助開關均工作在零電流開關條件下，並且控制邏輯簡單。
  17. All the power devices including main switches and auxiliary switches are in soft - switching condition ( zvs or zcs ), while the freewheeling diodes are turned off in zero current condition. besides, the control of resonance between inductance and capacitor can be easily realized without needing of setting the threshold values of the inductance current

    該電路中主開關和輔助開關均滿足zvs或zcs條件，續流二極體也工作在軟關斷方式，並且電感和電容之間的諧振控制不需要設定電感電流閾值，控制邏輯簡單，可實現四象限運行。
  18. In addition, some interface circuits, such as high - power d / a card, filter board, logic - process board and the feature of cvi programming language and windows programming are also introduced in detail with some chapters

    後面章節詳細介紹了系統的一些介面和控制電路，如大功率數模轉換板、濾波器、控制邏輯處理器等等，以及cvi工業控制軟體開發環境及windows編程等軟體方面的內容。
  19. Since high performance control logics are usually hard for non - scan test generation, dft structures could be embedded as offsets in tradition, while it will cause manufacturing cost increase and performance overhead. in this paper, an indirect test generation method based on retiming is proposed, which could dramatically reduce the cost of non - scan atpg without any loss of original optimized attributes. experiments on some iscas 89 benchmarks show the benefits of our approach in enhancing atpg of performance - driven logic

    對性能驅動控制邏輯進行測試生成難度較大，通常要加入可測性結構，但會影響原電路優化性能並增加生產成本.本文以重定時理論為基礎，提出了對高性能時序電路進行間接測試生成的方法，這種方法在不影響原電路任何優化特性的前提下，可顯著降低測試生成時間，提高測試生成質量.在iscas 』 89部分基準電路進行實驗，結果證明了其有效性
  20. The detailed functional modules consist of pci protocol conversion module 、 driver and magnifying module 、 control logic 、 clock circuit and configuration circuit

    具體的功能模塊包括pci協議轉換模塊、驅動放大模塊、控制邏輯、時鐘電路fifo電路和配置電路。
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