數字下變頻 的英文怎麼說

中文拼音 [shǔzìxiàbiànbīn]
數字下變頻 英文
digital down convert
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 下 : 下動詞1. （用在動詞后,表示由高處到低處） 2. （用在動詞后, 表示有空間, 能容納） 3. （用在動詞后, 表示動作的完成或結果）
  • 頻 : Ⅰ形容詞（次數多） frequent Ⅱ副詞（屢次） frequently; repeatedly Ⅲ名詞1 [物理學] （物體每秒鐘振動...
  • 數字 : 1. （表示數目的文字; 表示數目的符號） figure; digit; numeral; character; numeric character 2. （數量） quantity; amount
  1. We also researched the frequency structure of ddc and interchanged the filter multiphase heft and taking out - operation using the theory of equivalent counterchange in multisampling system

    從理論上研究了數字下變頻的頻譜結構，利用多采樣率系統中結構的等效變換原理，將濾波器多相分量與抽取操作進行互換。
  2. Digital down converter is one of the key technology of the sdr

    數字下變頻是軟體無線電中的關鍵技術之一。
  3. However, because of the use of cic filters in extant asic, it is usually very difficult to meet the requirements of wideband systems

    而當前的數字下變頻器件因為大多採用cic濾波器，很難滿足系統對帶寬的要求。
  4. Therefore, a method in design and fpga implementation of wideband digital if receivers based on polyphase filters to fulfill decimation and filtering is proposed

    本文正是基於這種目的，研究並設計了基於軟體無線電技術的中頻數字接收機的數字下變頻。
  5. The results of computer simulation and fpga simulation indicate that the technique is feasible and the experiment ' s results show that the performance of the system is excellent. in this paper, it summarize the basic principles of the if ( intermediate frequency ) digitization technology and detail the design and fpga realization of the digital if receiver system

    在具體實現中，提出了一種基於多相濾波結構來進行抽取濾波的中頻接收機方案，通過計算機模擬，證明了它的可行性，並圍繞此方案完成了數字下變頻硬體系統的設計和調試工作。
  6. The design of hardware module includes a / d converter, ddc ( digital down converter ), duc ( digital up converter ) and dsp. the design and application of ad6640 and ad6624 are fully discussed in this part. the design of software module includes the parameter design for ddc filter and the base - band signal processing of dsp

    收發信機硬體設計主要包括： a d 、 d a轉換器、數字下變頻器（ ddc ） 、數字上變頻器（ duc ）以及dsp ，論文詳盡介紹了a d器件ad6640 、 ddc器件ad6624和dsp器件tms320c5410的設計和應用；收信機軟體設計主要包括： ddc濾波器參數設計和dsp的基帶信號處理，給出了dqpsk調制、解調演算法的dsp實現。
  7. Ddc technology based on band - pass sampling

    基於帶通采樣的數字下變頻技術
  8. One is the digital down conversion. the method of look - table is described in detail

    其一是數字下變頻演算法，重點說明了其中的查表法及其推廣。
  9. Being based on the theory of the sdr, the topic researched the actual model of ddc

    本課題以軟體無線電的理論為基礎，研究了數字下變頻的實際處理模型。
  10. Digital down converter ( ddc ) is one of the core technologies in the software defined radio ( sdr ) receiver

    數字下變頻（ ddc : digitaldownconvert ）技術是軟體無線電接收機的核心技術。
  11. Frequency estimation technology and bandpass filtering, which are named as wideband digital downconversion technology, are the key technologies to realize data rate conversion system

    測頻技術以及帶通濾波，即寬帶數字下變頻技術，是實現數據率轉換系統的關鍵技術。
  12. This paper presents a method of realization of numeric transducer using tms320c542 dsp. the program of numeric down - transducer and multi - rate sampling is given

    摘要在tms320c542數字信號處理器上，用查表方法實現了dsp數字變頻器，並給出相關的數字下變頻和多抽樣率信號處理程序。
  13. Conventional ddc down - converts digitally by digital mixing, filtering, and decimating ; on condition of high - speed a / d converters, the commercial ddc is no longer applicable

    傳統的ddc通過數字混頻、濾波、抽取實現數字下變頻，在高速a d和電子偵察環境條件下商用ddc不能使用。
  14. As a result, some key technologies of sdr such as modulation, demodulation, ddc and dug have been hot topics. in this paper, some key technologies of sdr are researched deeply

    於是，軟體無線電中的一些關鍵技術，例如：調制解調技術，數字上變頻，數字下變頻等成為該領域的研究熱點。
  15. Filter poly - phase decomposition method is adopted in this dissertation. the partition of the tuning channel according to the digital mixing sequence, and the digital down - conversion by means of decimating first, the low - pass filtering and mixing realize efficiently the down - conversion of the variable carrier frequency band - pass signal

    本文採用濾波器多相分解方法，按數字混頻序列劃分調諧通道，使用先抽取，后低通濾波，再混頻的數字下變頻結構，高效實現了變載頻帶通信號數字下變頻。
  16. The design and application of ad6640 and ad6624 are fully discussed in this part. the design of software module includes the parameter design for ddc filter and the baseband signal processing of dsp. and the realization of the viterbi channel decoding algorithm by dsp and the simulation of the burst at the transmitter are discussed

    模塊的硬體設計主要包括： a d轉換器、數字下變頻器（ ddc ）以及dsp ，詳盡討論了a d器件ad6640和ddc器件ad6624的設計和應用；模塊的軟體設計主要包括： ddc濾波器參數設計和dsp的基帶信號處理，給出了viterbi通道譯碼演算法dsp實現和發射端突發形成的模擬實現。
  17. From resource - usage point, this design is better than traditional ddc

    在資源消耗上本設計也遠小於傳統的數字下變頻器。
  18. Consulting relevant reference and related theories in software radio, this thesis is working on technologies of digital channelized receivers, including the theories on a / d sampling, digital down converter, multi - velocity signal processing, polyphase filter and uniform dft filter bank

    本文針對電子偵察系統數字化實現，對數字式通道化接收機的相關技術進行了研究:包括a / d采樣的理論、數字下變頻相關理論、多速率信號處理的理論、多相結構優化抽取濾波、均勻dft濾波器組。
  19. Secondly, basing on single channel if sr receiver mathematic model, this thesis has designed if sr receiver subsystem and brought forward its design project and system circuit principle diagram, and explained the system working principle. furthermore, this thesis introduces the working principles and respective applications of wideband high - speed adc ad6640, ddc ad6620 and high - speed dsp tms320c6713 according with the if sr receiver subsystem high - speed analog digital conversion department, digital down conversion department and high speed digital signal processing department. thirdly, the thesis emphatically demonstrates the software realization department of the if sr receiver subsystem, which including ad6620 ' s inner parameter software setup, tms320c6713 data transmission and processing and the quadrant demodulation algorithm program realization

    其次，基於單通道中頻軟體無線電接收機數學模型，本文設計了中頻（ if ， intermediatefrequency ）軟體無線電接收機子系統，給出了中頻軟體無線電接收機子系統的設計方案和系統電路原理圖，說明了系統工作原理，並分別對應系統中的高速模數轉換部分、數字下變頻部分、基帶數字碩士學位論文軟體無線電理論研究及中頻軟體無線電接收機子系統設計信號處理部分，介紹了高速adcad664o ，數字下變頻器（ ddc ， digitaldownconverter ） ad6620 ，高速數字信號處理器（ dsp ， digitalsignalproeessor ） tms320c6713的工作原理，以及它們在中頻軟體無線電接收機子系統中的應用。
  20. According to the requirement of system property, ad6640 and hsp50214b are selected functioning as a / d switcher and specific programming digital downconverter, then the paper highlights the structures, functions, applications, designs and outer interface circuit connect of the ad6640 and hsp50214b

    結合系統性能的要求，選擇了ad6640和hsp50214b為a d轉換器和專用可編程數字下變頻器。重點分析了ad6640和hsp50214b的結構功能、應用設計以及外圍介面電路的連接。
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