數字乘法器 的英文怎麼說

中文拼音 [shǔzìchéngfǎqì]
數字乘法器 英文
digital multiplier unit
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 法 : Ⅰ名詞1 （由國家制定或認可的行為規則的總稱） law 2 （方法; 方式） way; method; mode; means 3 （標...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 數字 : 1. （表示數目的文字; 表示數目的符號） figure; digit; numeral; character; numeric character 2. （數量） quantity; amount
  • 法器 : [宗教] musical instruments used in a buddhist or taoist mass
  1. In digital relay, the percentage of noise will increase rapidly with the increase of sampling rate when derivation calculus is substituted by sampled difference term. to solve this problem, a new method using fragment function integrated with the least square algorithm is proposed in this paper. the influence of white noise is greatly reduced and the accuracy of the dead angle calculation is nicely improved after adopting the new method

    在數字式保護中，如果用差分代替求導將導致噪聲的百分比誤差隨著采樣頻率的提高而劇增，本文對此進行了分析並提出了用分段樣條函數最小二乘法來計算電流波形的導數值，以便在提高采樣率的同時降低噪聲誤差的影響，並將其應用於基於32位浮點dsp的新型變壓器保護裝置。
  2. The subject inducts digital time division technology ( pwm ), which is more advantageous at the accuracy and the predigest of hardware than simulant multiplication. what they call measuring power energy reasonably is that measuting except harmonics power energy fed back power. yet it realizes reasonable measurement of power energy which measures by base wave ac parameters method base on digital time division

    本課題引入了數字時分割（ pwm ）脈寬調制技術，在測量的準確性、硬體電路的簡化等方面都比模擬乘法器具有較高的優越性。所謂合理的計量電能，就是不計非線性負載回饋給電網的負的諧波電能，而採用基於數字時分割的基波交流參數測量的方法，真正實現了電能的合理計量。
  3. Different from general microprocessors, dsps have harvard architecture or enhanced harvard architecture and units of dsps can work in parallel. to perform multiplication in high speed, dsps also include hardware multiplier in its cpu

    與通用微處理器不同，數字信號處理器採用了哈佛總線結構或改進哈佛總線結構，具有高度的并行性，為了快速完成乘法計算在cpu中增設了硬體乘法單元。
  4. This paper include the following parts. firstly the sine exciting - voltage is guaranteed by direct digital synthesize technology ; secondly the digital output of cos ( 9 ) and sin ( 9 ) are generated by microcontroller ; thirdly the two voltage signals which are the product of the two former signals gained by the multiplying d / a converter, being filtered and amplified, have constant frequency, and one amplitude has sine function relationship of with the input angle, and the other amplitude has cosine function relationship of with the input angle ; finally the two signals are acquired and analyzed by relative instrument and software

    主要由以下幾部分組成：用數字頻率合成技術（ dds ）產生正弦激勵電壓信號u _ msin （ t ） ；用單片機產生幅度的數字量輸出sin （ ）和cos （ ） ；用乘法型d a轉換器實現激勵電壓和幅度的乘積，並通過濾波器和功放后即得到頻率固定，幅值隨輸入角成正餘弦變化的電壓信號；最後用數據採集卡採集輸出信號，顯示波形並進行頻譜分析。
  5. Through the datas contrast and analyse from two different kind of electronic electrical eneygy meter, one based on digital multiplier another one based on time - multiplier, present the means for reasonable metering

    本文對兩種新型的電子式電能表，即採用數字乘法器的基波電能表和採用時分割乘法器的電能表，進行了實驗室數據和現場走字數據對比和分析，提出了在諧波污染嚴重的電鐵牽引站的電能計量的解決方案。
  6. In this dissertation, the method to design and realize the digital receiver in the field programmable gate array ( fpga ) has been discussed ; combining coordinate rotation digital compute ( cordic ) to design nco, we get a efficient structure without multiplications

    本論文正是運用現場可編成邏輯器件（ fpga ）設計與實現數字接收機問題開展研究，結合坐標旋轉數值計算（ cordic ）演算法實現數控振蕩器（ nco ） ，得到一種免乘法器高效可移植性好的數字接收機fpga實現結構，並在現有的硬體平臺上進行了接收機系統的調試，測試結果表明該接收機能夠達到系統指標要求。
  7. In addition, the paper presents filter multi - phase structure for the shaping - filter design and its fpga implementation, where multipliers can be omitted by using the look - up table of the filter coefficients rom. test of the prototype circuit board shows the method is perfect

    然後介紹了數字成形濾波器多相結構的fpga實現方法，運用查詢系數rom的方法可以省去實現濾波器的乘法器結構，並對此實現方法進行軟體模擬和硬體電路板測試，測試結果達到了較理想的效果。
  8. As a special element to process digital signal, the basic theory of dsp was studies internationally in 1960s, and the first general dsp chip, with a hard multiplier, was put out in 1980s

    Dsp （ digitalsignalprocessor ）是一種專用的數字信號處理器。 20世紀60年代國際上開始了dsp理論基礎研究， 80年代推出第一個具有硬體乘法器的通用dsp晶元。
  9. Numeral eddy current sensor model building based on least square method

    基於最小二乘法的數字式渦流傳感器建模方法
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