數字信令 的英文怎麼說

中文拼音 [shǔzìxìnlìng]
數字信令 英文
digital signalling
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 數字 : 1. （表示數目的文字; 表示數目的符號） figure; digit; numeral; character; numeric character 2. （數量） quantity; amount
  1. In this thesis, we focused our attention on demodulation and digital signal processing ( dsp ) technique in the dpsk differential detection system used in pico - satellite test and control instructions, mainly from the point of view of software

    論文圍繞皮衛星通信中測控指令的dpsk差分解調系統，重點從軟體角度對通信解調技術和數字信號處理的一系列問題進行了實踐和研究。
  2. The author will research two different realizations : 1 ) to design a can bus interface system based on scm system. this interface system would change the digital commands obtained from the c ' an bus into the analog control signals and send these signals to the existing analog electric servos

    這項工作將研究兩種實現方案： 1 ）設計一個基於單片機系統的canbus介面系統，用來將can總線上的數字指令轉換為模擬控制信號，送給已有的電動伺服模擬控制系統。
  3. The author will research two different realizations : 1 ) to design and realized a can bus interface system based on scm system. this interface system would change the digital commands obtained from the can bus into the analog control signals and send these signals to the existing analog electric servos

    這項工作將研究兩種實現方案： 1 ）設計一個基於dsp的can總線介面系統，用來將can總線上的數字指令轉換為模擬控制信號，送給已有的電動伺服模擬控制系統。
  4. Speech digit signalling

    話音數字信令
  5. After implementing digital signaling system into analogue trunking system, we get these improvements : more reliable connection between users, higher speed of connection, and more functions in trunking system. mdc1200 signaling system is one kind of this signaling, which is developed by motorola for improving the performance of its analogue trunking system

    模擬集群通信是指它採用模擬語音進行通信，整個系統內沒有數字技術，但后來為了使通信連接更為可靠，模擬集群通信系統也採用了數字信令，使集群通信系統的用戶連接比較可靠，連通的速度有所提高，而且系統功能也相應增多。
  6. First, it introduces the corresponding knowledge, technical roadmap of trunking system, and digital trunking system signaling. second, it presents the encoding, decoding, modulation, demodulation parts and several signaling functions of mdc1200 signaling system. in addition, it analyzes some signaling data packet formats

    本文首先對集群通信的相關知識、發展趨勢以及集群通信數字信令進行了介紹，接著對mdc1200信令的編碼、解碼過程，調制、解調方式以及各種信令功能的信令數據格式進行了詳細地分析。
  7. Issam w. damaj electrical and computer engineering department, dhofar university, p. o. box 2509, salalah 211, oman

    還可以有其他選擇，比如用精簡指令集計算機和數字信號處理器內核來完成相應的工作。
  8. The models are also modified to map algorithms on vliw architecture signal processors. the thesis studies the data path structure of tms320c6x and then constructs scheduling and mapping models for c6000 instructions

    接著對模型進行了改進以適合信號處理演算法向超長指令字（ vliw ）的數字信號處理器進行映射，建立規劃與映射模型用於向tms320c6x進行指令映射。
  9. The verification process for a digital signal processor with very long instruction word ( vliw ) named thuasdsp2004, which is developed by tsinghua university microelectronic institute sponsored by national natural science foundation, is analyzed at the register - transfer level in this paper

    本文介紹在國家自然科學基金的資助下，由清華大學微電子研究所設計的具有超長指令字（ verylonginstructionword ， vliw ）體系結構特點的數字信號處理器thuasdsp2004的rtl級功能驗證工作。
  10. Hence, the requirements of the servo control card are getting much sophisticated. in this thesis, the research work and implementation details of a 6 axes servo control card are discussed. this card is based on the ti company ? dsp chip tms320f240 and has realized the following functions : a ) signal encoder, b ) position limit, c ) dual ram communication with cpu, d ) coordinated control e ) dia conversion

    該卡以ti公司的16位定點數字信號處理器tms320f240為核心晶元，實現6路編碼器信號輸入處理，軸限位中斷處理，通過雙埠ram與pc進行通訊，接收pc發送過來的控制指令和數據，完成插補運算、聯動運算等控制，通過d / a轉換電路，將結果轉化為模擬電壓送伺服放大器驅動電機。
  11. Advanced fpga technology is introduced to improve the integration of digital circuits, and all digital circuits in the original module are integrated in the fpga chips, which could not only reduce the cost, but also improve the reliability and measurement precision of the circuits. high speed digital signal processor ( dsp ) is selected as the coprocessor instead of scm ; it can receive all kinds of commands sent from vxi, analyze and execute the commands, harmonize each section of the module and process the data. higher - conversion - speed comparator chip is adopted to convert the input signals being measured into square waveform signals which could be identified by fpga chip ; it can expand the measurement range of frequency dramatically

    本文在原有vxi總線四通道計數器模塊的設計基礎上，通過對原模塊缺陷的分析，採用一些新的技術和新的電子器件來重新設計該計數器模塊:採用最新的fpga技術來提高數字電路的集成度，將原模塊中的所有數字電路全部集成在fpga晶元中，這樣不僅能節約成本，還能提高電路的可靠性和測量精度;採用高速的數字信號處理器（ dsp ）取代原有的單片機作為協處理器，來接收vxi發來的各種命令，分析命令、執行命令、協調模塊各部分的工作以及對數據的處理;採用轉換速率更高的比較器晶元將輸入的被測信號轉換為fpga晶元能夠識別的方波信號，能極大提高測量頻率的范圍;採用d / a轉換晶元和隔離運算放大器得到隔離通道所需的比較電平，該比較電平值能夠根據實際需求進行設置，能增強模塊的使用靈活性。
  12. With the development of general - purpose processors and high efficient algorithms, it is possible to implement a software - based real - time video encoder, and its low cost and easy upgradability attract developers " interests to migrate video encoding from dedicated hardware to more flexible software

    對于實時視頻應用環境，視頻編碼以往大多由專用設備完成。但隨著通用處理器和數字信號處理器（ dsp ）主頻的提高、面向視頻處理的指令集出現，使得更為經濟、靈活的軟體編碼成為可能。
  13. The digital signal processor becomes the preferred utility for realizing digital arithmetic rapidly and precisely relying on its particular hardware and instruction architecture

    而dsp （數字信號處理器）以其特有的硬體體系結構和指令體系成為快速精確實現數字信號處理演算法的首選工具。
  14. Traditional reduced instruction set computer ( risc ) and digital signal processor ( dsp ) have different application areas due to their different instruction set architecture ( isa ) and micro - architecture

    傳統的精簡指令集處理器（ risc ）和數字信號處理器（ dsp ）各自具有不同的指令集結構和微結構特點，適合於不同的應用領域。
  15. In this paper, we briefly introduced the performance of wave coding and vocoder, emphasizedly studied the principle and performance of variable rate vocoder q4401, including the internal construction and pins, qcelp coder & vocoder, pcm interface, cpu interface initialization process, command format and so on. we also designed a application circuit, with the experiment validated its performance. in this design, the pcm interface chip is tp3057, it was used to finish a / d transform, the compress coding was finished by q4401, the initialization and control were accomplished by 8051 singlechip

    重點是研究變速率語音編解碼晶元q4401的工作原理及性能。其中包括q4401的內部結構及管腳、 qcelp編碼方式、 pcm介面、 cpu介面、初始化過程、命令格式等，並在此基礎上，設計一個實際的應用電路，通過實驗，驗證其性能。在設計中用pcm介面晶元tp3057來完成從模擬信號到數字信號的轉換，再由q4401進行壓縮編碼，對q4401的初始化及控制由8051單片機來完成。
  16. Main cpu of instrument adopt digital signal process unit ( arm core ). the hardware design adopt distributing design which separate receiving and processing gps signal from the main system to use professional gps signal from the main system to use professional dsp to fulfill

    組合導航儀的主處理器採用高精簡指令集（ arm內核）的數字信號處理器件，硬體部分採用分散式設計，將gps信號的接收及處理獨立出來，採用專用dsp進行。
  17. This processor processes 9 - stage pipeline, and risc instruction set. its operation frequency is capable of achieving over 150mhz

    該數字信號處理器的cpu具有先進的vliw結構內核、九級流水線，具有類似risc的指令集，它的工作頻率可達到150mhz以上。
  18. Dsp owns rapid instruction periods, address buses separated from data buses, which can excellently adapt to the rapid digital signal process

    Dsp擁有快速的指令周期以及地址、數據總線分離等適合快速數字信號處理的優點。
  19. The paper introduces the cpu structure 、 memory composition 、 peripheral resources and the addressing modes of dsp, and interprets why it is fit for realizing digital signal processing arithmetic

    本文講述了dsp的cpu結構、存儲器構成、外設資源和指令尋址方式等，並解釋了它適合實現數字信號處理演算法的原因。
  20. The research work introduced in this paper mainly concerns the processor core design for media soc. media enhancement backward extension to mips - i compatible isa is presented in this paper. based on the analysis of inherent characteristics of media application algorithms, the basic mips - i compatible isa is extended to support sub - word parallel simd operation, special result handling, and dedicated media instructions

    在國家863計劃的支持下，我們開展了系統晶元中媒體增強的數字信號處理器核的設計研究，本文作為部分成果，著重探討了處理器核指令集結構的媒體處理增強、處理器核微結構的設計和優化以及系統總線設計和媒體數據流調度的問題。
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