數字邏輯組件 的英文怎麼說

中文拼音 [shǔzìluózǔjiàn]
數字邏輯組件 英文
digital logic module
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 組 : Ⅰ名詞1 （由不多的人員組成的單位） group 2 （姓氏） a surname Ⅱ動詞（組織） organize; form Ⅲ量詞（...
  • 件 : Ⅰ量詞（用於個體事物） piece; article; item Ⅱ名詞1. （指可以一一計算的事物） 2. （文件） letter; correspondence; paper; document
  • 數字 : 1. （表示數目的文字; 表示數目的符號） figure; digit; numeral; character; numeric character 2. （數量） quantity; amount
  • 邏輯 : logic
  • 組件 : assembler
  1. Complex programmable logic device ( cpld ), usually used to develop asic, is widely used in digital system to accomplish complex combinational and sequential logic

    復雜的可編程邏輯器件（ cpld ）廣泛地用於數字系統中，常用作設計自己的專用集成電路，可實現復雜的組合邏輯和時序邏輯。
  2. Then we explicate the hardware design in details, including implementing ad convert, extending multiple serial communications and external memory, and using cpld do some logic controls. thereby we implement abundance simulation interface, flexible digital interface and serial communication interface. at last we describe the software design, including software design of cpld basing on vhdl and software design of dsp

    本文首先介紹飛行模擬訓練系統的主要組成；接著說明飛控計算機整體系統方案的設計；然後詳細說明飛控計算機硬體平臺的設計，包括ad轉換、多串口通信、外部存儲器的擴展以及採用可編程邏輯器件cpld實現電路的邏輯控制等幾部分，體現了系統豐富的模擬介面、方便靈活的數字介面和串列通信介面；最後是軟體部分的編程，包括cpld部分的硬體描述語言程序設計，和dsp部分相關的程序設計。
  3. With the rapid development of semiconductor, digital integrated circuit ( p, memory, standard logic gates, etc. ) and advance computer technology, the various measuring instruments ( virtual instruments ) with the powerful function of pc are produced in different industrial and scientific research fields. as we all known, the traditional instruments are usually built with discrete components and small scale ics, the disadvantages are obvious in system design, debugging and maintenance

    隨著半導體技術與數字集成電路（微處理器、存貯器以及標準邏輯門電路等）技術的迅速發展，特別是隨著計算機技術的發展，在工業生產和科學技術研究的各行各業中，人們利用pc機的強大處理功能代替傳統儀器的某些部件，開發出各種測量儀器（虛擬儀器） ，傳統儀器的數字邏輯部分多是採用分立集成電路（ ic ）組成，分立ic愈多，給系統的電路設計、調試及維護帶來諸多不便。
  4. In order to conquer the shortcoming of general pwm forcibly switch technology, it takes advanced soft switch technology to recede the switch spoilage of power component and will be benefit to improve the frequency of switch electroplating power and raise the control precision and smooth of the output voltage and current of the electroplating power. it designs a digital software electroplating power that bases on the 80c196mc and epld ( erasable programmable logic device )

    為了克服常規pwm硬開關控制技術的缺陷，本文採用先進的軟開關技術，大大降低了功率開關器件的開關損耗，提高了電鍍電源的開關頻率，改善了輸出電源電壓和電流的平滑性與控制精度，採用基於80c196mc單片機與可擦除可編程邏輯器件epld組成的全數字化控制系統，研製了一臺軟開關電鍍電源。
  5. This paper projects a utility subdividing drive system of step motor, which consists of digital control module, drive module and power module, it uses at89c52 single chip processor as the core, it realizes the external event or generates control signal by i / o interface, timer and external interruption, the system introduce pld device and isp technology to the design of phase sequencer, it simplified circuit and improved the anti - disturbing capability by using abel - hdl language, this system can realizes data memory, velocity digital control and led display, etc. this paper adopted firstly the single - chip technique to design control system, which replaced old complicated logic control circuit and simplified test process

    本文研究了一種實用的步進電機細分驅動系統，由數字控制模塊、驅動模塊和電源模塊組成，系統以at89c52單片機為核心，通過單片機的i o口、定時器計數器中斷來實現外部事件監控以及控制信號的產生，系統將可編程邏輯器件（ pld ）器件和在系統編程（ isp ）新技術引入到細分驅動環行分配器的設計，通過abel _ hdl語言編程實現硬體軟化設計和邏輯重構，大大簡化了電路，並提高了電路抗干擾能力。使系統實現參數存儲，速度數字控制，數碼顯示，進退刀控制等功能。
  6. Coverage ranges from thermal properties and semiconductor materials to mosfets, digital logic families, memory devices, microprocessors, digital - to - analog and analog - to - digital converters, digital filters, and multichip module technology

    覆蓋范圍從熱性能和半導體材料的mosfet ，數字邏輯家庭，記憶體裝置，微處理器，數位類比和模擬到數字轉換器，數字濾波器，以及多晶元組件技術。
  7. Using the oracle9i as as the j2ee application server and ejb as the developing technology, this paper designs the data logic layer and business logic layer in the digital university, which is the application layer component in the digital university

    以oracle9ias作為數字化校園的j2ee應用服務器，以ejb組件技術為開發工具，設計了數字化校園中的數據邏輯層和業務邏輯層，這是數字化校園中的應用層部分。
  8. In this solution, the embedded soft cpu ip core is used as the kernel digital module with its periphery controllers based on residual les. in addition, analog channel circuit is added to form an integrated dso system. this dissertation focuses on framework construction, gui design, memory management, message fifo management, other hardware drivers and describes design and implementation of software simulation system written in advanced languages

    在這種方案中，使用了在fpga中嵌入cpu軟核作為控制核心，並用fpga晶元中剩餘的其他可編程邏輯資源構成該嵌入式系統的外圍器件，形成數字示波表的數字核心模塊，並配以模擬通道部分電路，組成了一個完整的數字示波表。
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