數轉換速度 的英文怎麼說

中文拼音 [shǔzhuǎnhuàn]
數轉換速度 英文
analog transducer
  • : 數副詞(屢次) frequently; repeatedly
  • : 轉構詞成分。
  • : 動詞1. (給人東西同時從他那裡取得別的東西) exchange; barter; trade 2. (變換; 更換) change 3. (兌換) exchange; cash
  • : Ⅰ形容詞(迅速; 快) fast; rapid; quick; speedy Ⅱ名詞1 (速度) speed; velocity 2 (姓氏) a surna...
  • : 度動詞[書面語] (推測; 估計) surmise; estimate
  • 轉換 : change; transform; convert; switch
  • 速度 : 1. [物理學] velocity; speed; blast; bat 2. [音樂] tempo3. (快慢的程度) speed; rate; pace; tempo
  1. There are five parts are as follows : in part one, the concept of switching function is introduced first to establish the nonlinear mathematical model of the induction motor variable frequency speed adjustment system which is fed by a sine pulse width modulated ( spwm ) inverter and takes the effect of the main magnetic circuit saturation into consideration, then the low frequency oscillation of the system is simulated according to the model. next, from the view point of energy conversion of the inverter - induction system, a criterion for the low frequency oscillation is proposed to determine whether the system is in low frequency oscillation which is judged by whether the interval of the negative current component of the inverter input current is more than 1 / fc ( fc is the carrier wave frequency of the inverter ) or not

    首先引入開關函概念,建立了正弦脈寬調制( spwm )逆變器供電異步電動機,考慮主磁路飽和時的變頻調系統整體學模型,模擬系統的低頻振蕩;其次從逆變器-異步電動機系統能量出發,提出通過檢測逆變器輸入電流中負電流的間隔時間是否大於1 / f _ c ( f _ c為逆變器載波頻率)來判定系統是否出現低頻振蕩;最後的實驗結果驗證了系統低頻振蕩建模和判據的實用性和正確性。
  2. Analog - to - digital conversion rate

    數轉換速度
  3. These converters exploiting the enhanced speed and circuit density of modern vlsi technologies, have been widely used for high resolution a / d conversion

    這類模/器可充分利用現代vlsi的高、高集成的優點,已成為實現高精模/的主要技術。
  4. 3. adopting changes the speed coefficient and analyses our country district industrial structure change speed to the industrial structure, and reaches : since the reform and open, our country industrial structure change speed assumes east and middle and west weakens the power

    3 、採用對產業結構分析我國地區產業結構,得出:改革開放以來,我國產業結構呈東、中、西減弱之勢。
  5. Automatic weighing has quick conversion rate, high resolution, lcd display, print reports and forms automatically, can communicate with computer, and create database

    自動稱重具有快、解析高、液晶顯示,自動列印據報表,與電腦通訊,建立據庫,直觀等特點。
  6. When we gather data, we often fell the gathering speed is slow, the precision of a / d transition is bad and other problem, based on the gathering theory, this dissertation put forward relevant resolving project

    對于據採集與中遇到的采樣、孔徑誤差、模等問題,本文根據采樣定理的理論,提出了不同的解決方案。
  7. The dissertation discusses about field multi - channel nuclear data collecting system based on mcu in detail. the data collecting system adopts mcu ( micro - control units ) at89c55 as controlling core, applying high speed and low power adcs ( analog - to - digital converters ) cmos chip max 191 and 320x240 matrix graphic lcd ( liquid crystal display )

    該系統在硬體上以單片機at89c55為控制核心,以高低功耗的a d晶元max191作為多道脈沖幅分析器的模器件,以320 240點陣圖形液晶顯示屏作為系統的顯示器,根據初步的性能測試,系統已經達到預期的設計目標。
  8. Comparing with conventional nyquist converters, - converters greatly release the requirements for high performance of analog circuit and precisely matched components. additionally, these converters exploit the enhanced speed, circuit density and low cost of modern vlsi technologies. currentlly, - adcs have been widely used for audio a / d conversion

    - adc採用過采樣噪聲整形技術實現高精,和傳統的nyquist率模器相比,避免了對模擬電路性能指標和元器件匹配精的較高要求,並可充分利用現代vlsi的高、高集成、低成本的優點,已成為音頻模的主要技術。
  9. Advanced fpga technology is introduced to improve the integration of digital circuits, and all digital circuits in the original module are integrated in the fpga chips, which could not only reduce the cost, but also improve the reliability and measurement precision of the circuits. high speed digital signal processor ( dsp ) is selected as the coprocessor instead of scm ; it can receive all kinds of commands sent from vxi, analyze and execute the commands, harmonize each section of the module and process the data. higher - conversion - speed comparator chip is adopted to convert the input signals being measured into square waveform signals which could be identified by fpga chip ; it can expand the measurement range of frequency dramatically

    本文在原有vxi總線四通道計器模塊的設計基礎上,通過對原模塊缺陷的分析,採用一些新的技術和新的電子器件來重新設計該計器模塊:採用最新的fpga技術來提高字電路的集成,將原模塊中的所有字電路全部集成在fpga晶元中,這樣不僅能節約成本,還能提高電路的可靠性和測量精;採用高字信號處理器( dsp )取代原有的單片機作為協處理器,來接收vxi發來的各種命令,分析命令、執行命令、協調模塊各部分的工作以及對據的處理;採用率更高的比較器晶元將輸入的被測信號為fpga晶元能夠識別的方波信號,能極大提高測量頻率的范圍;採用d / a晶元和隔離運算放大器得到隔離通道所需的比較電平,該比較電平值能夠根據實際需求進行設置,能增強模塊的使用靈活性。
  10. First designs the high precision reading system of accelerators in the kernel of adc & fpga

    首先設計了以高解析器adc和fpga為核心的高精字讀出電路。
  11. At last we introduce the realization of all the parts, the problem in the circuit design and the measured data. the results show that the designed system has met the requirement. in this dissertation, direct digital synthesis technology has been used in the phase - locked frequency synthesizer, which can make full use of the characteristics of direct digital synthesis technology such as flexible output wave shape and continuous

    本課題將直接字式合成技術用於鎖相頻率合成器中,該方法將直接字合成的特點,如輸出波形靈活且相位連續、頻率穩定高、輸出頻率解析高、頻率快、輸出相位噪聲低、集成高、功耗低、體積小等與鎖相環路的頻帶寬、工作頻率高、頻譜質量好等優點有機的結合起來,從而在寬帶的條件下實現了比較好的雜散性能和相噪。
  12. Limited by adc chip ’ s manufacturing processing, it is hard for a single adc chip to acquire the high sampling rate and high precision at the same time. the method of parallel times - interleaved sampling adc system is effective to solve this problem

    受模晶元發展水平的限制,單片adc晶元很難同時滿足高高精的要求,多片adc并行交替采樣技術是突破採集系統這一瓶頸的有效方法之一。
  13. The compiler has made significant improvements in float to int conversion speed

    。編譯器極大地提高了浮點到整
  14. The speed of atm switch is rather fast than the router, and then it becomes the backbone equipment in data communication. however, how to make the ip data of clients transmit in atm is also a difficulty issue

    雖然atm交機的據交大大高於路由器的,成為了據通信的骨幹設備,但如何將終端用戶的ip據在atm上傳輸卻是一個需要解決的大問題。
  15. The direct digital frequency synthesizer is a kind of fully digitized frequency synthesizer, which consists of the phase accumulator, the sine look - up table, the digital to analog converter and the low band filter. it is of high frequency resolution, fast frequency switching speed, low phase noise, the ability to switch frequencies while maintaining constant phase, and the ability to producing arbitrary waveforms

    直接字頻率合成器是一種全字化的頻率合成器,由相位累加器、波形rom 、 d a器和低通濾波器構成, dds技術具有頻率解析高、頻率切快、頻率切時相位連續、輸出相位噪聲低和可以產生任意波形等優點。
  16. The task of realtime display on lcd and the complicated control arithmetic are implemented in this smps system, and a microcontroller with high resolution, high speed, high integration, large memory is necessary. in this paper, the design theory of s / h ware module which forms the smps control module and the design scheme is discussed in detail. in this system, the digital compute - control module is implemented with samsung ’ s high resolution, high integration, arm core microcontroller s3c44b0 and ad converter with 16bit resolution produced by ad company, ad7705. the ad7705 implements the data acquisition of the voltage and current feedback signal, and transfer the data to microcontroller through spi bus, which is implemented with s3c44b0 ’ s gpio, for computation and display

    本開關電源系統不僅完成lcd的實時顯示,還要完成復雜控制演算法,需要高、高精、高集成、大存儲空間的微控制器的支持。本文詳細的論述了構成電源控制模塊的各個軟硬體模塊的設計原理和設計方案。本系統提出了以samsung公司的高、高集成的基於arm架構的微控制器s3c44b0與ad公司具有16位解析的模器ad7705晶元構成字採集運算控制模塊。
  17. The complete air - cooled control system has been realized by at89c52 microprocessor and icl7109 the integral adc which has high counter - interference capability. the main circuit uses non - contract solid module and has the characteristics of high speed switching off and avoiding contract burned to stop blower fan

    該系統採用at89c52微處理器及抗干擾能力強的積分型模器件icl7109實現據的採集及處理,實現了完整的風冷控制系統功能;主迴路採用無觸點固體模塊,具有關斷快、避免觸點燒壞、導致風機停運的特點。
  18. The auto - test process could be done by several instructions " executed. results of the ip core ' s simulation shows the adc can achieve a 10 - bit resolution. system has 8 input channel and 5 sample period selection with the control of internal bus

    對該ip核的全局模擬結果表明,所設計的模器可以達到10位的精,可以通過系統總線信號對8路信號輸入通道以及5種采樣率進行選擇控制,可以通過系統指令完成模器的自測試功能。
  19. Novel method for improving the speed of pipelined a d converters

    一種提高流水線模的方法
  20. 3 ) a 16 - bits high speed a / d conversion device was used, it quicken a / d conversion speed ten times

    3 )採用16位高a d器完成模,使模數轉換速度提高了10倍。
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