時標電路 的英文怎麼說

中文拼音 [shíbiāodiànlù]
時標電路 英文
timing circuit
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 標 : Ⅰ名詞1 [書面語] （樹梢） treetop; the tip of a tree2 （枝節或表面） symptom; outside appearance; ...
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. Contrapose to the instability of the third - order charge - pump pll system, the loop optimization method is employed in system level design to decide the bandwidth and phase margin, therefore the loop bandwidth locates at the maximum phase margin to guarantee the stability of the system. according to tsmc 0. 35 m sige bicmos model, the sub - circuits in the designed pll and the whole system are simulated and verified by the cadence spectre

    5 .根據tsmc0 . 35 msigebicmos工藝模型，利用cadencespectre模擬軟體對所設計的電荷泵鎖相環路中各個模塊及整個系統進行了模擬模擬，模擬結果顯示，在1 . 5v電源電壓下，頻率為200mhz的參考輸入信號，輸出中心頻率為800mhz ，分頻電路採用4分頻，環路帶寬為10mhz ，捕獲時間大約為0 . 92 s ，功耗大約為15mw ，達到了設計指標。
  2. In order to obtain the most economic benefits, the paper utilized the theory of " homalographic characteristic " and " share alike compensation current characteristic " to build up the best compensation relation for " hour - current " curve applied to transformer substation and for " length - current " curve applied to distribution line

    以獲得最大經濟效益為目標，利用「等面積特性」和「補償電流等分特性」理論。推導了應用於變電站的「時間?電流」曲線關系中存在的最佳補償關系，以及應用於配電線路的「長度?電流」曲線關系中存在的最佳補償關系，及補償后的經濟效益計算模型。
  3. This paper starts the research of the liquid floated pendulous accelerometer testing system according to the engineering. at first, this paper gives the brief introduction of the history and present status of accelerometer and its testing technology, the working principium and math model of the liquid floated pendu - lous accelerometer, and then, decides the binary width pulse force retrim loop as the design proposal of testing system, researches the transfer function of every part in the system emphasizly, analyses the stability of the whole accelerometer testing system from the angle of control theoretics by the open loop transfer function of system, and designed the correcting net, analyses the basal problems such as resolution, sampling restraint, precision and so on, designs the hardware testing circuits such as preamplification, band - pass filter, alternating amplifier, phase sensitive demodulatorn, pulse - width modulation, frequency scale circuit, moment current generator. finally, using the graphics program language labv - iew which is designed for testing field especially by ni accomplishes the solfware design of testing system, realized the testing functions

    首先對加速度計及其測試技術的發展歷史和現狀，液浮擺式加速度計的工作原理和數學模型等作了簡要的介紹，然後確定了以二元調寬脈沖再平衡測試迴路為設計方案，並從控制理論的角度進行了分析，著重研究了系統中各部分的傳遞函數，利用系統開環傳遞函數分析了系統的穩定性，同時設計了系統的校正網路;分析了二元調寬脈沖再平衡測試迴路的解析度、采樣約束以及測試精度等基本問題，並按照系統分析的結果設計了包括前置放大、帶通濾波、交流放大、相敏解調、脈寬調制、頻標電路以及力矩電流發生器等測試系統各部分硬體電路，驗證了電路的正確性，最後按照測試系統的要求，採用了美國ni公司專為測試領域所開發的虛擬儀器工具? ? labview作為測試軟體開發工具，利用該圖形化編程語言完成了測試系統軟體部分的設計，實現了測試功能。
  4. The international standard sequential circuits iscas ' 89 ( addendum ' 93 included ) is used to verify the algorithm, and the results are better than other algorithms "

    採用國際標準時序電路iscas 』 89 （包括addendum 』 93 ）進行了演算法驗證，取得了優于文獻中其它演算法的結果。
  5. " electronic 1c chip drawing system " provides many functions such as " modify the position of the component ' s diagram " " modify the color of the component ' s diagram " " magnify and minify the component ' s diagram without distortion " " change the type of drawing line " " edit some physical properties of the component " " copy and paste diagram of one component " " delete one or more component diagrams " " move more than one components " positions " " change the z _ order of the diagram, set it to back or bring it to front " " save the drawing of the electronic components to one file and the file extension name is *. brd " " print the drawing ". users can finish all these functions easily by clicking and dragging the mouse

    電路板元器件繪制系統主要完成了使用鼠標拖拽、鼠標點按的方式繪制電路板上各種常見的元器件圖形；編輯電路板上元器件圖形的位置；編輯元器件圖形的顏色；不失真的對器件圖形進行放大和縮小；編輯元器件圖形的線型；編輯電路板上各個器件的物理屬性（比如電阻的阻值大小、電容的容量大小、額定電壓等） ；復制已經繪制出的電路板上的器件；粘貼剪貼板上的器件；刪除單個或多個已經繪制出的器件圖形；同時改變多個器件圖形的位置；改變繪制區內各個元器件的zorder順序，也就是可以將層疊在一起的圖形置前或置后；把繪制的電路板器件圖保存到指定文件中；能打開、查看和修改保存的電路板器件圖；列印電路板器件圖。
  6. In this paper, the design of a specific chip for circuit emulation based on ip is put forward and realized and the main functional modules and the key algorithms including an all - digital adaptive clock recovery method and a dynamic depth buffer algorithm are described in detail

    文章根據相關標準提出並實現了一種電路模擬專用晶元的設計方案，並對其中主要功能模塊和關鍵演算法作出了詳細說明，包括一種全數字的自適應時鐘恢復方法、動態深度緩沖演算法等。
  7. Abstract : a new clock - driven eco placement algorithm is presented for standard - cell layout design based on the table - lookup delay model. it considers useful clock skew information in the placement stage. it also modifies the positions of cells locally to make better preparation for the clock routing. experimental results show that with little influence to other circuit performance, the algorithm can improve permissible skew range distribution evidently

    文摘:提出了一種新的時鐘性能驅動的增量式布局演算法，它針對目前工業界較為流行的標準單元布局，應用查找表模型來計算延遲.由於在布局階段較早地考慮到時鐘信息，可以通過調整單元位置，更有利於后續的有用偏差時鐘布線和偏差優化問題.來自於工業界的測試用例結果表明，該演算法可以有效地改善合理偏差范圍的分佈，而對電路的其它性能影響很小
  8. Because the hybrid acquisition scheme ( combines parallel search with serial search ) based on the correlator provides the flexibility in the trade - off between the mean acquisition time and system complexity and is easy to implement, it ? focus on the scheme here. on the other hand, this paper analyzes the effect of multiple access inference ( mai ) on the code acquisition performance for the multipath fading channels

    基於相關器解擴的串-並混合方案由於有著可在平均捕獲時間和電路復雜程度（這是捕獲電路的兩個重要指標）這兩個技術指標間靈活折衷的優點和易於實現的特點，本文的重點就放在該方案中。
  9. The theory of mixer diode - anti - diodes, harmonic mixed frequency and harmonic balance analysis is given

    同時，給出了混頻器的相關的概念和指標，以及各種不同的混頻電路及其指標的差異。
  10. In our culture condition, the lepcs express oval cell markers ck 19, ck 14, ov6 and oc. 10, but not oc. 2 and oc. 5. the cells also express c - met, the receptor for hepa tocyte growth factor ( hgf ). antigens traditionally associated with haematopoietic stem cells, including c - kit, thy - 1 and cd 34, can be expressed by oval cells

    該細胞系是典型的上皮樣細胞，體外生長時成「鋪路石」樣排布；在電鏡下觀察，細胞核質比大，胞漿中除一些線粒體和核糖體外缺乏其他細胞器；在體外培養時細胞可以保持不分化狀態，表達卵圓膽管細胞的分子標志，如ck14 ， ck19 ， ov6 ， oc
  11. Then we introduce the character of the atmosphere channel, which we emphasized on the atmosphere scatter, absorption and scintillation ' s effect on the laser beam. in chapter, we explain why we used cassegrain telescope to collect the optical signal at first, then the lightsource, detector, front amplifier used in optical communication has been compared to that of fiber communication, the noise including shot noise, thermal noise and background light noise has been explained here for analysis the snr and ber in the next section

    在第三章介紹無線光接入系統的光收發單元，採用多孔徑卡塞格倫式的收發天線對消除減小大氣湍流影響有較大作用，針對大氣通道的特點無線光系統收發單元在光源、光探測器、前置放大電路上存在許多有別于光纖通信的技術，同時還闡述了光接收機包括背景噪聲的噪聲機制和接收靈敏度、誤碼率等指標，最後給出了一個整個傳送鏈路的功率預算。
  12. During the infrared failure circuit detection system is diagnosing the electronic equipment, because the time and the place are different between the infrared thermal imaging device is diagnosing the standard electric circuit board and the infrared thermal imaging device is diagnosing the failure electric circuit board, the position of their infrared thermal image will take place the relative changing ( for example translation or revolves )

    在紅外電路故障診斷系統對電子設備診斷時，由於紅外熱像儀對標準電路板進行檢測的時間與地點和紅外熱像儀對故障電路板進行檢測的時間與地點的不同，導致它們的紅外熱像圖的位置會發生相對改變（如平移或旋轉） 。
  13. Being master control part, user controller stores, manages, display and query user information ; as slave control part, sub - user controller calculates and temporarily stores power sent from measuring module ; measuring module measures electric energy by using power meter ' s special circuit which simplifies circuit design and connects or breaks up power supply circuit by relay ; in order to transmitting data fast and exactly, rs - 485 communication standard is adopts between user controller and sub - user controller

    主控部分用戶控制模塊可存儲、管理、顯示和查詢用戶電能信息；從控部分子用戶控制模塊計算並暫存電能測量模塊輸出功率數據；電能計量模塊採用電度表專用厚膜電路hdb6進行電能計量，簡化了電路設計，同時還利用繼電器控制連接或斷開用戶的供電迴路；在主從部分間採用rs - 485通信標準實現數據快速、準確的傳輸。
  14. Standard test method for estimating electromigration median time - to - failure and sigma of integrated circuit metallizations metric

    集成電路金屬噴鍍總量和電遷移中值失效時間的評定標準試驗方法
  15. With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit

    在工程設計方法及結構化設計和高層次綜合的研究中，介紹了在深亞微米工藝條件使用的方法和asic設計流程，討論了高層次綜合的核心如何從描述推出電路構成的設計思路，針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法，給出了用vhdl語言進行代碼設計時的規范和風格，在面向soc的驗證策略討論了動態和靜態的驗證技術，提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。
  16. Based on the research and analysis of system structure of 10 - bit 100msps pipelined cmos adc, according to the system performance, the specifications of sub _ adc is obtained, while the sub _ adc including the preamplifier - latch comparator, the reference ladder resistance and the clock - control encode circuits are discussed in detail

    基於對10 - bit100mspspipelinedcmosadc系統結構的分析研究，結合系統性能確定了子adc的指標要求，詳細討論並設計了子adc單元模塊的設計，包括預放大鎖存比較器，參考電阻串和時鐘控制編碼電路。
  17. Analyze item by item the position of unintact cycle, the running clearance of unintact cycle, locking - deform, datum dimension regulating, repeatly install, power voltage wave and marking running etc. at the same time, we give the calculating formula to calculating the running marking random error, and use it to calculate the system error of big diameter measure instrument - - datum dimension frame error, gyro - wheel diameter error, error caused by circumstance temperature, error caused by backing distance, angle error, delay error of data collecting circuit, lathe main shaft running error, workpiece install partial error

    對不完整圓的位置、不完整圓的轉動間隙、鎖緊變形、基準尺調整、重復安裝、電源電壓波動、標記轉動等隨機誤差進行了逐項分析，並給出轉動標記隨機誤差的計算公式。對大直徑測量儀的系統誤差?基準尺尺架誤差、滾輪直徑誤差、環境溫度引起的誤差、後退距離引起的誤差、角度誤差、數據採集電路延時誤差、車床主軸回轉誤差、工件安裝偏心誤差分別進行了計算，最後對誤差進行合成。
  18. On the analyzing of the technology trend, a plan of developing a multifunctional mark printer is brought forward the procedure of the development of a multifunctional mark printer is detailed in this thesis. a interface - card and a photoelectric board is designed, a control circuit is assembled by using them, through which a computer can control the mark printer ; a mark printer driver is developed by using com technology ; the mechanical part of the mark printer is designed by imitating milling machine ; a database software for components management is developed for high - speed train bearing industry. the managements include the registering for components, unique mark printing on components and analyzing of useful parameters. the user can complete the lifetime tracing for a component expediently

    設計介面卡和光電隔離放大電路，組成了電機控制和抬筆控制電路，通過它們pc機可以控制標號印表機工作；採用組件化技術開發了標號印表機控制軟體，驅動標號印表機工作；參考刻模銑床原理，設計了機械部分；針對高速客車軸承廠，開發了零件標號管理軟體，使標號列印和信息管理系統有機結合起來，達到在登記零件信息的同時，自動列印零件的標號，方便了對零件的跟蹤管理。
  19. Automatic water - measuring meter is the combinative production of traditional method and present cmos integration circuit technology. it consists of water - level sensor and mainframe circuit. on the basis of analyzing its application, this paper gives the design of mainframe circuit, including time circuit, time - sequence circuit, input - interface circuit, switch circuit and power circuit

    本文在分析cmos集成電路應用的基礎上，給出了自動量水儀表主機電路的設計，包括定時電路、時序電路、輸入介面電路、開關電路和電源電路的設計；其次，對水位傳感器進行了研究，分析了水位傳感器的工作原理、測量使用條件、動態特性、靜態特性以及水位傳感器的率定、標定方法。
  20. Test vector generation based on ant algorithm is presented and implemented, the pheromone computation formula for sequential circuits and status transfer rules are given, and the test results are compared with the results of the other existing test generators - hitec, gatest, cris, digate and strategate, based on standard sequential circuits iscas ' 89 and other synchronous sequential circuits

    提出並實現了基於螞蟻演算法的測試矢量生成，給出了針對時序電路測試矢量生成的信息素計算公式和狀態轉移規則。在iscas 』 89標準時序電路和幾個同步時序電路上實現了測試生成，並將生成結果和其它現有測試生成器（ hitec ， gatest ， cris ， digate ， strategate ）的生成結果作了比較、分析。
分享友人
分享到 Line

分享到臉書