時鐘發生器 的英文怎麼說

中文拼音 [shízhōngfāshēngqì]
時鐘發生器 英文
clock generator
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 鐘 : Ⅰ名詞1 （用銅或鐵製成的響器） bell 2 （計時器） clock 3 （指鐘點、時間） time 4 （沒有把兒的杯子...
  • 發 : 名詞（頭發） hair
  • 生 : Ⅰ動詞1 （生育; 生殖） give birth to; bear 2 （出生） be born 3 （生長） grow 4 （生存; 活） live;...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  1. The clock recovery block of usb2. 0 transceiver macrocell consists of phase locked circuit, such as pll and dll ( delay locked loop ). this block use external crystal 12mhz sin signal to produce 60mhz, 120mhz, 480mhz clock signal, and can recover colock signal form date wave. it can support 480mbps ( hs ) and 12mbps ( fs ) word speeds as defined in usb2. 0 specification.

    目的是用鎖相環電路? pll和dll （延遲鎖相環）實現usb2 . 0收發器宏單元utm的時鐘恢復模塊。其中pll環路構成的時鐘發生器將外部晶振的12mhz正弦信號生成60mhz 、 120mhz 、 480mhz等本地時鐘信號。 dll環路依據本地時鐘信號對外部數據信號進行時鐘恢復。
  2. Clock - pulse generator

    時鐘脈波發生器
  3. Controllable rsfq timing pulse generator

    可控時鐘信號發生器
  4. The third, the whole circuit of digital cmos image sensor is presented. the circuits of pixel array, clock signal generator and sam have been improved on the base of simulation

    再次，我們對整個cmos數字圖像傳感器進行了電路設計，主要包括：時鐘信號發生器，順序移位寄存器和像素陣列。
  5. As is known to all, the former pcb system uses an out - chip oscillator, which is called out - chip clock generator, to provide system with clocks

    比如以前的板極系統多數使用電路板上的外部振蕩電路作為系統的時鐘發生器。
  6. This logic is designed containing input signal delay, event type classification, event pre - scaling and timing logic and works in pipeline mode under control of 20mhz clock which ensures no dead time contribution

    主觸發邏輯在20m時鐘下以流水線的方式工作，保證沒有死時間的產生。第二個例子是任意數字信號發生器的設計。
  7. The concept of " timing " in the article is not the clock in our ordinary living, but syntheses which is made up of some frequency source in the signal generator ( such as cs atom frequency standard, rb clock & high accuracy quartz crystal oscillator ) which produces the primary frequency, the matching input interface and the matching output interface and controlling circuit etc. for example, bits is a kind of timing equipment, which is used to control the timing of some functions

    本文論及的「時鐘」概念不是指日常生活中使用的鐘表，而是由產生基準頻率的信號發生器（如銫原子頻率標準、銣鐘及高精度石英晶體振蕩器等）中的某種頻率源以及相配套的輸入、輸出介面和控制電路等組成的一整套具有特定同步定時功能的綜合體。如bits就是一種時鐘設備，它提供用在通信系統中控制某些功能的定時的時間基準設備，時鐘提供的信號稱為基準信號、定時信號或同步信號。
  8. The signal collecting system of singlechip collects the signals from generator. the paper introduces the every part of the singlechip. the key component is a 8051cpu, its surrounding circuits include dc power source, simulating signal collecting circuit, digital signal collecting circuit, a / d converting circuit, clock generating circuit, counting frequency circuit, controlling circuit, communicating circuit, and some other circuits

    前臺單片機採集系統完成對發電機組多信息量的採集，本文詳細介紹了電路設計，系統的核心器件為8051cpu ，其外圍電路包括電源電路、模擬信號採集電路、 a d轉換電路、數字信號採集電路、時鐘發生電路、測頻電路、控制電路、通訊電路等。
  9. After ca. 20 minutes ( regeneration time of the drier ) and when the operating temperature is attained on the residual ozone eliminator, the ozat ? cfs begins to flush

    大概20分鐘（乾燥器的再生時間）后並且尾氣破壞器的溫度達到時，打開增壓泵開始運行，打開臭氧發生器電源對臭氧發生器進行吹掃。
  10. Within this scope, users can get almost any frequency clock by configuring the register, as the tune - process is nearly continual ( in fact there are many discrete frequency points ). the main circuit of the clock generator is a cppll ( charge pump pll ) designed in a method

    該時鐘發生器可以向系統提供頻率范圍是93 . 75k - 180mhz的時鐘信號，用戶可以通過配置寄存器的方法使時鐘發生器輸出自己需要的頻率，而且這一調頻過程幾乎是連續的（實際上是眾多離散點構成的線性近似） 。
  11. The adc aperture jitter must be minimal, and the sampling clock generated from a low phase - noise quartz crystal oscillator

    Adc的孔徑抖動必需盡可能的小，而且要使用低相位噪聲的石英晶體振蕩器作為采樣時鐘發生器。
  12. The implementation of in - chip clock generator is often based on modern cmos ic process technology which is usually adopted by very large scale digital system. while designing a deep sub - micrometer cmos circuit, delay, power consumption and die size are of the main factors that must be considered

    使用現代深亞微米cmos集成電路工藝製造的內部時鐘發生器要綜合考慮延時、功耗、面積等各種重要因素，而且經常要針對soc系統的需求設計特殊的電路結構。
  13. 2. using the method of dds + pll to generate the system clock and count clock which are synchronous. 3

    2 .通過dds + pll的方法實現脈沖/數據發生器所需的系統時鐘以及計數時鐘的產生，以及其同步的實現。
  14. Advanced multi - clock mechanism and clock generator

    先進的多時鐘機制和時鐘發生器
  15. Gerneral specification for clock and station mark generators

    時鐘臺標發生器通用技術條件
  16. Crock generator, pulse

    脈沖時鐘發生器
  17. But to design and integrate a clock generator into a chip is a far cry from the out - chip one

    文中研究的鎖相環時鐘發生器就針對該要求而設計。
  18. The pll clock generator, which has been integrated in " line ", will be taped out through tsmc 0. 25um mpw ( multi - project wafer ) project

    該鎖相環時鐘發生器採用了tsmc0 . 25umcmos製造工藝，它將和「 line 」晶元一起在tsmc的多晶圓（ mpw ）項目下流片。
  19. A monolithic clock synthesis pll, which is expected to be a reference 800mhz clock generator in accelerometer system, has been designed and characterized in this paper

    本文設計了一種採用鎖相環頻率合成技術實現的800mhz時鐘發生器，用作加速度傳感器讀出電路的基準時鐘信號。
  20. This article presents the property of virtual experiment. it describes the main model of virtual experiment for microcomputer interface technology, and the experiment example is presented

    摘要闡述了虛擬實驗的特點，描述了互動型微機介面技術虛擬實驗模式，並以波特率時鐘發生器為例，介紹了微機介面技術虛擬實驗系統及應用。
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