時鐘進程 的英文怎麼說

中文拼音 [shízhōngjìnchéng]
時鐘進程 英文
clock process
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 鐘 : Ⅰ名詞1 （用銅或鐵製成的響器） bell 2 （計時器） clock 3 （指鐘點、時間） time 4 （沒有把兒的杯子...
  • 進 : 進構詞成分。
  • 程 : 名詞1 （規章; 法式） rule; regulation 2 （進度; 程序） order; procedure 3 （路途; 一段路） journe...
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  • 進程 : course; proceeding; process; progress
  1. Thirdly, the paper discusses the driver of the peripheral equipment, how to port the uc / os - n and uclinux, h. 323 protocol and the application of the system in the digital speech classroom. also some software and hardware measure are adopted to enhance the system stability. at last, the shortcoming and the something to be improved are given. dsp can be used to realize real - time speech coding algorithm, and after porting ( ac / os - n, arm can manage the keyboard, the lcd and the ethernet peripheral etc. then the embedded network system with specific purpose can be used in others fields, such as pda, set of top, web tv, ect

    在實際設計實現中，為提高系統軟、硬體整體穩定性和可靠性，使用了以下幾種方法： （ 1 ）低電壓復位、抗電源抖動能力、增加時鐘監測電路、抗電磁干擾能力、散熱等技術； （ 2 ）多層pcb設計，線路板結構緊湊，電源部分採用數字5v 、 3 . 3v 、 3v 、 1 . 8v和模擬5v多電源供電； （ 3 ）選用表面貼和bga封裝的器件； （ 4 ）按照軟體工程的要求進行系統分析，規劃系統框圖、流程分析、模塊劃分，減小了不同模塊的相關性，從而最大限度避免了錯誤的發生。
  2. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  3. Plc, robot and cad / cam are called the three major pillars in the modem factory automation. plc, as the head of the three, has become the leading basic automatic equipment in the field of the industry control in the early 1980s " but as a matter of fact, plc being with the lack of friendly man machine interface, rnakes no close relationship between human and machineometimes it even can not be promoted and applied in some fields aiming at the situation mat those imported products are too expensive while domestic products are of rare famous brands, a plc man - machine interface - plc monitor is developedthis paper systemically introduces the developing procedure for the whole system, including how to design hardware and software system. especially emphasizing plc communication protocol. real time message accessing, lcd controller instruction set, definition of data construction for message & tag screens and how to display thern, assignment of internal resource of cpuealization in software among plc & manitor, file format defining a nd download of user data, etcplc monitor will compensate some weakpoints of plc, and extend the application rangeimultanneously enhance the performance of plc and increase the attached value of mechanical machines, undoubtedly it will see hight market prospect

    針對人機界面進口產品的高昂價格和國產品牌稀少的這一現狀，研製開發了一種plc人機界面? plc監控器。本文系統地介紹了整個系統的開發過程，包括硬體系統、軟體系統的設計及實現，重點介紹了plc通信協議，監控器的基本工作原理以及期望實現的功能，監控器電源電路、 sram存儲器掉電保護電路、 cpu監控器電路、按鍵輸入電路的設計及按鍵狀態的讀入，時鐘信息的設定與讀取， cpu液晶顯示器指令系統，信息畫面及標簽數據結構的定義及顯示方法， cpu內部資源的分配，監控器與plc通信的軟體實現，文件格式的定義以及畫面數據的下載等。 plc監控器彌補了plc一些方面的不足，可以擴大plc的應用范圍，提升機械設備的檔次，增加設備的附加價值，具有一定的市場前景。
  4. Furthermore, low power flip - flop design by reducing the short - circuit power which relates with clock overlapping is also mentioned in this paper

    此外，由於觸發器的短路功耗和控制觸發器的時鐘信號的交迭程度有關，因此文章還對通過合理規劃時鐘信號的交迭來達到減少觸發器短路功耗的低功耗觸發器結構進行了討論。
  5. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  6. The host computer system ' s functions are as follows : duplex communicate with automatic station data poll gather to each automatic station save and handle the data format and print diagram based on the gathered data download the parameter to automatic station and adjust the clock dial - up to network and long - distance control automatic rainfall station consists of outer garment, meet rain bucket, water input and output electromagnetic valve, measure bucket, storage battery and circuit control

    可以與自動站進行雙向通訊，完成對各個自動站數據輪詢採集並進行存儲、處理，並生成圖表，根據採集的數據形成圖表、列印，可以向自動雨量下載參數、時鐘校準以及遠程聯網撥號和控制。自動雨量站包括外罩、接雨桶、進放水電磁閥、測量桶、蓄電池以及電控部分等部分組成。
  7. This design is the first solid - state memory system for satellite, which can confront with multi - clock sources and multi - data sources compatibly. it is the fist design that integrates all functions of data processing and control into a single programed logic device. this design can be an ip core that can bring large advantage when system upgrade in the future

    本星載固存系統是我國星載固存系統中第一個採用多數據源，多時鐘源進行兼容設計的單一固存系統；第一個採用ip化、參數化設計思想，採用單一邏輯編程器件做為固存系統唯一控制部件，為以後系統升級帶來了很大好處；第一個採用功耗均衡思想來降低系統功耗。
  8. Then, by introducing a simple route selecting algorithm in chooser, a capacity - consistent restoration path set in one flooding wave can be obtained, so avoiding the multiple flooding waves in conventional algorithms

    同時以時鐘驅動的方式驅動網路中各參與恢復進程的節點發送消息包，以確保所形成的恢復路由集合為ksp集合。
  9. There has to be some gap of clock cycles between the unblocking of signals and the next instruction carried by the process, and any occurrence of a signal in this window of time is lost

    從消除信號阻塞到進程執行下一個指令之間，必然會有時鐘周期間隙，任何在此時間窗口發生的信號都會丟掉。
  10. Its clever succinctness lets you code in five minutes the report generators, network probes, text filters, and process monitors that demand day - long efforts with other languages

    它很簡潔，而且這種簡潔是巧妙的，這使您能在五分鐘內編寫報告生成器、網路探測、文本過濾器和進程監視器，如果使用其他語言的話需一天的時間才能完成。
  11. The fpga of xilinx inc. works as a important part, with which many functional modules, including a controller of lcd display, a fifo ( first in first out ) memory, a controller of sampling clock, and so on, were implemented

    Xilinx公司的fpga （現場可編程門陣列）作為系統的外圍控制器，實現系統的其他很多功能模塊，包括lcd （液晶顯示）控制器、測頻和測周模塊、 fifo （先進現出存儲器） 、采樣時鐘控制器，等等。
  12. As the clock crept toward 11 : 15 p. m. last thursday, the 500 scientists and engineers packed into the control room and an adjacent auditorium at the princeton plasma physics laboratory kept their eyes riveted on a bank of computer monitors

    上個星期三下午，當時鐘指向11 : 15時，這500名科學家及工程師擠進了普林斯頓普拿死馬物理實驗室的控制室及旁邊的禮堂，他們的目光盯住了一排電腦顯示器。
  13. For simple applications one might simply have an real time clock interrupt signal a semaphore and have a process that encapsulates all the time dependent stuff

    對簡單的應用而言，可以簡單地用實時時鐘中斷發送一個信號量並用一個進程封裝所有依賴時間的部分。
  14. Make clear the procedure of sending and receiving packet of kernel and the implementation of traffic control. the special mechanism in linux such as wait queue, task queue, time interrupt is also explained. after analyzing the file system of linux at large, we bring forward the design of modifying of file system. since many little file is created during the service of email and file service, we introduce the non volatile random access ram, by modifying the arithmetic of file system, changing the data flow of file system

    本文詳細介紹了針對網路專用服務器的專用linux系統的設計，對linux文件系統進行了詳盡的解析，包括vfs的實現， buffercache的作用等；並對塊設備驅動程序在內核中各個介面進行了分析；解析了內核接收和發送數據包的全過程以及流量控制在內核中的全過程；並對linux系統的一些特殊的機制如等待隊列，任務隊列，時鐘中斷等進行了詳細的解釋。
  15. This thesis will give you a brief introduction on mpeg2 system layer, and then go on with the implementation of de - multiplex and multiplex in the transrating system, including processing specific program information and program clock reference

    本文將對mpeg2系統層進行簡單介紹，然後具體說明本課題系統層復用解復用過程的實現方法，包括比較關鍵的對節目特定信息的處理以及對系統時鐘的處理方法等。
  16. Process management and scheduling, inter - process communication, storage management, parallel control, file systems, transaction, clock synchronization, security mechanism, etc. the research topic of this thesis is " load distribution ", a destination of distributed process management and scheduling

    分散式操作系統涉及到多個方面的工作，如：進程管理和調度、進程間通信、存儲管理、並發控制、文件系統、事務處理、時鐘同步、安全機制等。本論文的研究范圍是針對分散式進程管理和調度的目標之一： 「負載分佈」 。
  17. Then, with another whistle, he began to move forward ; the train increased its speed, and soon its rapidity became frightful ; a prolonged screech issued from the locomotive ; the piston worked up and down twenty strokes to the second. they perceived that the whole train, rushing on at the rate of a hundred miles an hour, hardly bore upon the rails at all

    它不斷加快速度，一會兒，速度已經大到了十分可怕的程度，車上只能聽見機車發出的一陣隆隆聲，活塞每秒鐘進返二十次，車軸在機油盒裡冒著濃煙，簡直可以說整個火車就象以每小時一百英里的速度在前進，鐵軌所負擔的重量減少了，因為高速抵銷了重量。
  18. First, we introduced the basic operation princinple of a - t - m & c - s and its function modules. subsequently, we divided the system into six major modulars : real - time clock function modular, real - time process schedule modular, distribute db management modular, net - work monitor modular, message control modular, and mistake torlerance modular

    按中間件特性，把系統劃分為6個主要的管理控制模塊，分別為實時時鐘管理模塊，實時進程調度管理模塊，分散式數據庫管理模塊，網路監控模塊，消息管理模塊，和系統容錯管理模塊。
  19. Xdesk is a very powerful & stable virtual desktop manager / desktop assistant - features quick view, appbar, powerful rules, reminders & alarms, cpu meter, applications autorestart, memory cleaner, tasklist, hotkeys, hotmouse, mouse - scrolling, mouse - knocking, hotcorners, and more

    軟體簡介： xdesk是一個強大的虛擬桌面管理助手，可以快速查看、快速啟動工具條、時鐘提醒、 cpu資源監測器、應用程序定時啟動、內存管理器、進程管理等等子程序組成，全面解決你在計算機使用過程中遇到的小難題。
  20. According to the reserved scanning address sequence, channel range and trigger mode, it can sample data. the module can change sample time and sample length. the sample data can be disposed by the cpu on board and then be stored in 64k ram

    本模塊可根據預先設置的掃描地址序列、通道量程和觸發方式進行數據採集，采樣時鐘和采樣長度可以改變，測得數據經過板上cpu的實時處理后在64k的存儲器中緩存。
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