晶元設計 的英文怎麼說

中文拼音 [jīngyuánshèjì]
晶元設計 英文
system-on-chidesign
  • 晶 : Ⅰ形容詞（光亮） brilliant; glittering Ⅱ名詞1. （水晶） quartz; （rock） crystal 2. （晶體） any crystalline substance
  • 設 : Ⅰ動詞1 （設立; 布置） set up; establish; found 2 （籌劃） work out : 設計陷害 plot a frame up; fr...
  • 計 : Ⅰ動詞1 （計算） count; compute; calculate; number 2 （設想; 打算） plan; plot Ⅱ名詞1 （測量或計算...
  • 設計 : devise; project; plan; design; excogitation; layout; layout work; styling
  1. Method for the design of mrna detecting genechip based on codon usage bias

    一種基於密碼子使用偏性的檢測型基因晶元設計方法
  2. Eventually, the digital correlator of the modificatory structure is designed and realized by fpga, and it manifests very high and reliable correlative performance

    最後用fpga晶元設計並硬體實現了修正結構的數字相關器，這種結構的數字相關器具有很好的工作性能。
  3. The intelligent time relay is intelligent double row four location display instrument, it is the operation of three keys, have the function of single setting double setting time, it applies special technique to resist interference, avdvanced craft, high technology, satisfied the clients need. its the new product which assimilate the nation and internationals same products character

    名稱： sng智能時間繼電器sng智能時間繼電器是智能型雙排四位顯示儀表，儀表為三鍵操作，具有單雙時間設置，參數設置快捷，符號顯示簡潔，儀表採用進口超強抗干擾晶元設計質量可靠。
  4. Cryptogrammic chip introduced in this paper has been tested on the altera ' s apex20ke fpga. the main clock frequency reached 40mhz. the chip includes 30, 000 les. in order to utilize esb resource in altera ' s chip, we adopted embedded rom and ram and can realize the function of whole system with only one chip. lt is the embodiment of methodology and notion of sopc ( system on a programmable chip ). the simulation of this cryptogrammic chip proves the correctness of function of the chip, which shows that the important ideology based reconfigurable architecture has special significance in designing of cryptogrammic chip

    本文所闡述的密碼晶元在altera公司的apex20kefpga上進行了測試。工作頻率達到了40mhz ，佔用了3萬個le . ，利用altera器件的esb資源，採用內置ram和內置rom設計方法，用一片晶元即可實現整個系統的功能，充分體現了sopc的設計方法和理念，對晶元的模擬和測試均證明晶元功能正確，表明基於可重組體系結構這一重要思想在密碼晶元設計中具有特殊的意義。該晶元的設計遵循hdl設計方法學的一般方法。
  5. This paper systematically presents the whole design process of a cryptogrammic chip based on reconfigurable architecture. firstly it begins with a brief introduction to the background of the cryptogrammic chip design, and it clearly states the characteristic and the researching thoughts of cryptogrammic chip design with hdl. then the design environment and cipher algorithms are introduced briefly

    本文系統地論述了基於可重組體系結構的密碼晶元設計的全過程，文章首先闡述了該設計的課題背景，給出了使用hdl方法設計密碼晶元的特點和研究思路，然後對晶元的設計環境作了簡要說明，並對密碼演算法進行了簡單介紹。
  6. The company has over 70 employees, 70 % of which have master or ph. d. degrees, 80 % are engineers, and 57 % are ic designers, 18 % of which have oversea employment experience

    公司團隊現共計70餘人， 70具有碩士和博士學位， 80為研發工程技術人員， 57為晶元設計人員，其中具有「海歸」背景的高端人才佔18 。
  7. As a fabless semiconductor company that designs high - performance chipsets, so far the company is the only chip company gets funding from sarft to develop both receiver and transmitter chips, which demonstrates the strong regulatory support we get from the government authorities

    作為一家設計高性能晶元的無工廠半導體公司，創毅視訊得到了政府監管部門的強力扶持，目前公司是唯一的一家獲得廣電總局資金資助的收發晶元設計企業。
  8. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。
  9. W2 technology is a fabless integrated circuit ( ic ) corporation, specializing in designing, testing, selling high - end power management ic products as well as offering comprehensive solutions of power management

    雙元科技股份有限公司是專業從事高端電源晶元設計、測試及銷售，同時提供完整電源解決方案的企業。
  10. Second, based on reading radio frequency card module of em corporation, the design of a rfid system is given

    其次，根據em公司提供的讀頭晶元，設計研製了一種射頻識別系統。
  11. High performance voltage - to - frequencey converter

    高精度電壓頻率轉換器晶元設計
  12. As dispatches from foreign news agencies report, toshiba now development has made a kind of every unit may stock the multilayer level chip design of two bit informations, and before it is this, every unit can only have a bit information

    據外電報道，東芝日前開發出了一種每個單元可存儲兩個比特信息的多層級晶元設計，而在此之前每個單元只能存在一個比特信息。
  13. Mr bao is also an active investor and has sponsored a number of successful start - ups, including linktone / intrinsic, a us - listed leading wireless value - added services provider, vimicro international, first chinese fables ic design company listed on nasdaq, oak pacific, the largest online interactive entertainment and media company in china and r2g, a pioneer in online music publishing in china

    包先生作為投資者也非常活躍，投資了一系列成功的創業企業，包括在美國上市的無線增值服務提供商掌上靈通/英斯克技術有限公司，第一家在納斯達克上市的中國多媒體晶元設計製造商中星微電子，中國最大的在線娛樂互動和媒體公司千橡互動，中國在線音樂批發商r2g 。
  14. In the design of lan ip telephone, the author has participated in the follow works : the systemdesign ; select chips, make the schematic circuit and pcb board of the main data processing board and debug it. the fpga design, simulation and debugging of receiving part of lan ip main chip

    我在項目中完成的工作：與項目組成員合作制定系統方案及根據要求選擇晶元，設計數據處理主板，製作pcb板並加以調試；數據處理主板中的局域網ip電話機主晶元中接收部分的fpga設計、模擬和調試。
  15. Total quality management acts as traffic rules in design flow

    驗證獨立化是晶元設計規模發展后的必然需要。
  16. It ought to be compatible with low - voltage circuit process and satisfy requirement of high - voltage and large current this paper deeply discusses threshold voltage, on - resistance and current characteristic of ldmos, and builds the approximately accurate model of these electrical parameters

    本文討論的ldmos結構是pdp選址驅動晶元設計的一個關鍵問題，該結構實現了與低壓電路工藝的兼容，並滿足耐壓高、電流大的實際需要。
  17. Aim at the dtc ' s blemish mentioned above and the direction of dtc technique development, the dissertation put great emphasis on the work as follows, with an eye to exalt dtc system function : ( 1 ) a new speed - flux observer of an induction motor is proposed to enhance the accuracy of flux observing, which is an adaptive closed - loop flux observer and different from the traditions. a new adaptive speed - observation - way is deduced out according to the popov ' s stability theories ; ( 2 ) to improve the performance of dtc at low speed operation, we have to exalt the accuracy of the stator flux estimation and a new way of bp neural network based on extended pidbp algorithm is given to estimate and tune the stator resistance of an induction motor to increase the accuracy of the stator flux estimation ; ( 3 ) digital signal processor is adopted to realize digital control. an device of direct torque control system is designed for experiment using tms320lf2407 chip produced by ti company ; ( 4 ) bring up a distributed direct torque control system based on sercos bus, sercos stand for serial real time communication system agreement which is most in keeping with synchronous with moderate motor control ; ( 5 ) the basic design frame of the hardware and software of the whole control system is given here and some concrete problem in the experiments is described here in detail

    針對上面提到的直接轉矩控制的缺陷和未來直接轉矩控制技術發展方向，本論文重點做了以下幾個方面的工作，目的在於提高dtc系統的綜合性能： （ 1 ）提出一種新型的速度磁鏈觀測器，新型的速度磁鏈觀測器採用自適應閉環磁鏈觀測器代替傳統的積分器從而提高磁鏈觀測的精度，並且根據popov超穩定性理論推導出轉速的新型自適應收斂律； （ 2 ）改善系統的低速運行性能，主要從提高低速時對定子磁鏈的估計精度入手，提出了一種提高定子磁鏈觀測精度的新思路? ?利用基於bp網路增廣pidbp學習演算法來實時在線地修正定子電阻參數； （ 3 ）採用數字信號處理器dsp實現系統全數字化硬體控制，結合ti公司生產的tms320lf2407晶元，設計了直接轉矩控制系統的實驗裝置； （ 4 ）提出了基於sercos總線網路化分散式的直接轉矩控制系統， sercos （ serialrealtimecommunicationsystem ）是目前最適合同步和協調控制的串列實時通信協議； （ 5 ）基本勾勒出整個控制系統的硬體和軟體設計基本框架，詳細描述一些實驗中的具體的細節問題。
  18. As technical development in computer and integrated circuit, the chip design based on the technique of eda is becoming the mainstream of that the electronic system is designed

    隨著計算機和集成電路技術的不斷發展，基於eda技術的晶元設計正在成為電子系統設計的主流。
  19. The paper designs a type of circuit which combines gps receiver with computer by means of the icl232 integration chip. it achieves deliver and receiver at the same time. it gives receiver program chart

    採用icl232單電源集成電路晶元設計gps接收機與微型計算機介面電路，可以同時實現發送和接收信號的電平轉換，並給出了接收的流程圖。
  20. This dissertation is supported by the following projects : national foundation for science research on the theory of sub - deep micro and super high speed multimedia chip design " ( no. 6987601 0 ) national foundation for high technology research & development " interface of vlsi ip core and related design technology " ( 863 - soc - y - 3 - 1 ) a - national r & d programs for key technologies for the 9th five - year plan research on high level language description and embedded technology for mcu " ( 97 - 758 - 01 - 53 - 08 ) national foundation for the ministry of education, prc " research on the optimal theory and methodology of soc software / hardware integration co - design and co - verification " ( moe [ 2001 ] 215 ) national foundation for science and technology publication " design of interface circuit for computer with verilog " [ ( 99 ) - f - l - 011 ] a deep research on system level design methodology of 1c and the design technology of mcu - ip and interface ip are made in this dissertation. the main work and achievements are as follows : 1 building block principle and the building block component maximum principle are brought forward based on the research of developing history of ic design

    本文基於以下科研項目撰寫：國家自然科學基金「深亞微米超高速多媒體晶元設計理論的研究」 （ 69876010 ）國家863計劃「超大規模集成電路ip核介面及相關設計技術」 （ 863 - soc - y - 3 - 1 ）國家「九五」重點科技攻關「 mcu高層語言描述及其嵌入技術研究」 （ 97 - 758 - 01 - 53 - 08 ）國家教育部「 soc軟硬體集成協同設計和驗證優化理論和方法研究」 （教技司[ 2001 ] 215 ）國家科技學術著作出版基金「 verilog與pc機介面電路設計」 （ 99 - f - 1 - 011 ）論文的主要工作和取得的成果如下： 1 、在研究集成電路設計方法學發展歷史的基礎上，提出了設計的積木化原則和積木元件最大化原則。
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