晶體控制信號 的英文怎麼說

中文拼音 [jīngtǐkòngzhìxìnháo]
晶體控制信號 英文
crystal controlled signal
  • 晶 : Ⅰ形容詞（光亮） brilliant; glittering Ⅱ名詞1. （水晶） quartz; （rock） crystal 2. （晶體） any crystalline substance
  • 體 : 體構詞成分。
  • 控 : 動詞1 （告發;控告） accuse; charge 2 （控制） control; dominate 3 （使容器口兒朝下 讓裏面的液體慢...
  • 制 : Ⅰ動詞1 （製造） make; manufacture 2 （擬訂; 規定） draw up; establish 3 （用強力約束; 限定; 管束...
  • 號 : 號Ⅰ名1 （名稱） name 2 （別號; 字） assumed name; alternative name3 （商店） business house 4 （...
  • 晶體 : [晶體學] crystal; vitrella; crystal body; crystalloid; x-tal
  • 控制 : control; dominate; regulate; govern; manage; check; cybernate; manipulate; encraty; rule; rein; c...
  1. Chapter two is data sample of system. it will discuss the data conversion theory, 24bit e - a data conversion, mux - channel switch sampling technology, and emc design. among them, we will introduce the principle and application of ads 1251, application of photomos technology in mux - channel switch sampling, and emc design with hardware and software of gas feed controller, which has good performance in reliability

    第二章介紹系統的數據採集，該部分包括24bit -采樣原理、多路信號切換採集技術和電磁兼容設計，其中，主要介紹了ads1251晶元的工作原理和應用， photomos技術在多路信號切換采樣中的應用，以及配氣控制器在硬體、軟體等方面所做的電磁兼容設計，通過這些設計使得系統具有很好的穩定性和抗干擾性。
  2. The development of fieldbus technology made lonworks field bus outstanding in all kinds of fieldbus. this paper simply introduces some kinds of common using fieldbus and the important position and influence of lonworks fieldbus in all kinds of fieldbus, carefully describes the technology core of lonworks technology, puts great emphasis on the introduction of the development and design of public security node of intelligent district which adopts computer, communication and control technology, carefully designs the interfaces of hardware circuits. the public security node of intelligent adopts 8031 single chip as its main processor to complete the application program of user, which mainly collects, process and control all kinds of field signal, and neuron chip 3150 as its slave processor to communicate with other nodes on field network, which works under parrel slave a mode

    現場總線技術的發展使得lonworks技術脫穎而出，本文簡要介紹了常用的幾種現場總線的概況以及lonworks技術在現場總線技術中的地位和影響，對lonworks技術的技術核心：神經元晶元、 lontalk協議、 lonworks收發器、 lonbuilder及nodebuilder進行詳盡的描述；重點介紹了集先進的計算機技術、通信技術、控制技術為一體的智能小區安防節點的開發與研製，對節點硬體電路的各種介面進行了詳盡的設計。本文設計的智能小區安防節點採用單片機8031作為主處理器來完成用戶的應用程序，主要負責對各種現場信號進行採集、處理及控制，工作在并行從a方式下的神經元晶元mc3150作為從處理器，主要完成與現場網路上的各節點及中心控制室之間的通信工作。
  3. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  4. In this project, the kernel chip is xc2vp4, which is a platform fpga manufac - tured by xilinx co. ise7. 1i foundation which is the latest and integrated eda devel - oping tool is used in the software developing. modelsim se6. 0 and ise simulator are the simulation tools. synplify pro8. 1 and xst are the synthesis tools

    本課題硬體採用xilinx公司xc2vp4平臺級fpga為核心控制晶元，軟體採用xilinx公司最新集成化eda開發工具ise7 . 1ifoundation ，模擬工具modelsimse6 . 0 ，綜合工具synplifypro8 . 1等設計完成，高速電路採用lvds信號進行連接。
  5. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。
  6. The hardware in this system includes a digital signal processor, an analogy input channel, a lcd, an analogy output path, a keyboard input part, a guard circuit and a logic control circuit

    該系統硬體包括數字信號處理器晶元、前向輸入通道、液晶顯示器、模擬量輸出部分、鍵盤輸入部分、保護電路部分和邏輯控制部分。
  7. This paper mainly focuses on the noise limiting by means of the direct sequence spread spectrum ( dsss ) and the analysis of the transmission performance of the plc and some digital modulation technology. the contents of the paper is as follows : 1 ) the technical feasibility is proved after simulating noise limiting principle of dsss by means of systemview, the simulation software ; 2 ) a kind of band pass filter ( bpf ) is realized according to the requirement of filter and the principle of butterworth approximation, which satisfies the index of performance of dsss. 3 ) the low voltage plc system includes the sc1128, the specific modulation / demodulation ic, the bpf filter and other circuit components, furthermore, the control function of system is realized by means of the personal computer and the microcontroller

    本課題在對低壓電力線的傳輸特性和數字調制技術進行分析的基礎上，將通信理論中的直接序列擴頻技術（ dsss ）用於解決低壓電力線通信的干擾問題，主要研究內容如下： （ 1 ）用通信模擬軟體systemview對dsss技術的通信和抗干擾原理進行模擬分析，分別對時域和頻域下採用dsss技術前後接收信號的頻譜進行分析，驗證dsss技術在本系統中的可行性； （ 2 ）由dsss技術對濾波系統的要求，根據濾波理論分析了巴特沃思型濾波器的逼近原理並設計了合適的濾波電路； （ 3 ）用調制解調晶元sc1128和自行設計的濾波器加之輔助外圍電路，構造出低壓電力線載波通信系統，並採用atmel公司的單片機設計了接收和發射電路的微控制器； （ 4 ）分別對採取抗干擾措施前後輸入和輸出信號進行對比實驗，並對結果進行分析，驗證了dsss技術對干擾信號的抑制作用。
  8. Gps is a planet wireless conductance system which is global and all - weather, gps can offer high precision time orientation information to infinite user, clock precision reachs 10 ? 6 magnitude 。 not only changes traditional time method of quartz crystal clock, but also replaces wireless shortwave and even more lowfrequency signal and tv signal whose overlay range is limited and low precision, offers advantage to geology field task, achieve automatization and high precision of seismic flow observation

    利用gps授時信號全方位、全天候、連續性、實時性和高精度的特點，以gps信號為基準來校準本地時鐘（晶體振蕩時鐘或原子鐘） ，將gps接收機輸出信號的長期穩定度和恆溫晶振的短期穩定度相結合，應用大規模可編程邏輯器件，設計和實現了由pc104控制的實時在線授時系統。
  9. Wirings of the poly layer are always utilized under the silicon grid technics. to control the macro - cell signal delay and improve signal integrality, the crossing among different nets must be averagely distributed to reduce the number of layer permutation. the metal layer wirings should be maximized and the length of poly layer wiring in each net should be minimized

    硅柵工藝晶體管級布線利用多晶層走線，為了控制宏單元時延性能及改善信號完整性形態，關鍵是不同線網間交叉的均衡分配以減少走線的換層次數，最大化金屬層走線以及每一線網多晶層走線長度的有效控制。
  10. The hardware of the system is made up of p89c61x2ba as main processor, usbn9604 as usb interface, grating signal - processing circuit, xc95108 as signal subdivision, sensing, counter circuit and so on

    硬體部分以p89c61x2ba為控制核心，包括採用usbn9604介面晶元的usb介面電路，光柵尺輸出信號處理電路，以xc95108為主的信號細分、辨向和計數電路等。
  11. The concept of " timing " in the article is not the clock in our ordinary living, but syntheses which is made up of some frequency source in the signal generator ( such as cs atom frequency standard, rb clock & high accuracy quartz crystal oscillator ) which produces the primary frequency, the matching input interface and the matching output interface and controlling circuit etc. for example, bits is a kind of timing equipment, which is used to control the timing of some functions

    本文論及的「時鐘」概念不是指日常生活中使用的鐘表，而是由產生基準頻率的信號發生器（如銫原子頻率標準、銣鐘及高精度石英晶體振蕩器等）中的某種頻率源以及相配套的輸入、輸出介面和控制電路等組成的一整套具有特定同步定時功能的綜合體。如bits就是一種時鐘設備，它提供用在通信系統中控制某些功能的定時的時間基準設備，時鐘提供的信號稱為基準信號、定時信號或同步信號。
  12. Then the paper analyzes control system of hybrid active power filter, the way of harmonic detecting and the principle of control system, digital low pass filter and the generation of pwm, on the base of which the paper designs a new parallel hybrid active power filter which is controlled by tms320lf2407, and detailedly introduces drive circuit of pwm, sampling circuit of current, voltage adjustment and protection circuit, communication circuit, liquid crystal display circuit

    分析了混合型有源濾波器的控制系統、諧波檢測方法及控制原理、數字低通濾波器和pwm信號的產生，在此基礎上設計了一種基於tms320lf2407為控制核心的並聯混合型有源電力濾波器硬體原理圖。並對pwm驅動電路、電流采樣電路、電壓調整、按鍵輸入和保護電路、通信模塊、液晶顯示模塊進行了較詳細的分析說明。
  13. To realize nolinear excitation controller, it must be improved that the disposal speed of nolinear excitation control " s signal. with analyzing and comparing all kinds of microcomputer excitation controller, a new microcomputer excitation control scheme is offered that is based on dsp controller while the cpld chip is utilized for realizing the function of pulse trigger. it is described in detail that the method of realizing controllable silicon digital logic by verilog hardware describe language and the designed digital pulse trigger " s veracity was validated by digital simulation

    論文進一步針對非線性勵磁控制要求信號處理速度高、信息量大的特點，在對目前微機勵磁控制器分析基礎上，提出採用dsp控制器晶元作為核心處理器的微機勵磁控制器的解決方案，運用復雜可編程邏輯器件cpld晶元實現可控硅同步脈沖觸發單元，並簡要說明了verilog硬體描述語言和數字脈沖形成邏輯的方法，通過電路數字模擬對所設計的數字觸發單元進行了驗證。
  14. Although there have been many application instances in the field of input / output device technology, we need an specific project and technology route aimed at an given application. in this thesis, we combine the introduction and analysis of relative technology to describe the accomplishment of a coordinate collecting device which is based on incremental rotary encoder. this device is an specific device applied to collect the corrdinate displacement of ground image ’ s three - dimensional model created by full digital photogrammetric station. cpld chip and vhdl are applied in this device to carry out the following work : phase control of the electrical pulse created by incremental rotary encoder, counting the number of electrical pulse, controling the state of signal processing circuit, exchanging data between this circuit and pci control

    本文結合相關技術的介紹和分析，描述了一個基於增量式旋轉編碼器的坐標參量採集介面卡的實現，此介面卡是一種用於採集全數字攝影測量系統地面影像模型坐標位移量的專用設備，該設備採用cpld器件和vhdl語言實現增量式旋轉編碼器的脈沖信號鑒相和計數、信號處理部分的狀態控制以及和pci總線晶元ch365之間的數據交換和通信功能，同時該設備的驅動程序基於wdm模式，並且配置有結構良好的動態鏈接庫程序作為系統軟體和驅動程序之間的數據和控制交互中間介面，能夠方便地運行在windows98 / 2000 / xp操作系統平臺上，具有實時性強、工作穩定、通用性較好和性價比高等特點。
  15. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  16. Aim at the dtc ' s blemish mentioned above and the direction of dtc technique development, the dissertation put great emphasis on the work as follows, with an eye to exalt dtc system function : ( 1 ) a new speed - flux observer of an induction motor is proposed to enhance the accuracy of flux observing, which is an adaptive closed - loop flux observer and different from the traditions. a new adaptive speed - observation - way is deduced out according to the popov ' s stability theories ; ( 2 ) to improve the performance of dtc at low speed operation, we have to exalt the accuracy of the stator flux estimation and a new way of bp neural network based on extended pidbp algorithm is given to estimate and tune the stator resistance of an induction motor to increase the accuracy of the stator flux estimation ; ( 3 ) digital signal processor is adopted to realize digital control. an device of direct torque control system is designed for experiment using tms320lf2407 chip produced by ti company ; ( 4 ) bring up a distributed direct torque control system based on sercos bus, sercos stand for serial real time communication system agreement which is most in keeping with synchronous with moderate motor control ; ( 5 ) the basic design frame of the hardware and software of the whole control system is given here and some concrete problem in the experiments is described here in detail

    針對上面提到的直接轉矩控制的缺陷和未來直接轉矩控制技術發展方向，本論文重點做了以下幾個方面的工作，目的在於提高dtc系統的綜合性能： （ 1 ）提出一種新型的速度磁鏈觀測器，新型的速度磁鏈觀測器採用自適應閉環磁鏈觀測器代替傳統的積分器從而提高磁鏈觀測的精度，並且根據popov超穩定性理論推導出轉速的新型自適應收斂律； （ 2 ）改善系統的低速運行性能，主要從提高低速時對定子磁鏈的估計精度入手，提出了一種提高定子磁鏈觀測精度的新思路? ?利用基於bp網路增廣pidbp學習演算法來實時在線地修正定子電阻參數； （ 3 ）採用數字信號處理器dsp實現系統全數字化硬體控制，結合ti公司生產的tms320lf2407晶元，設計了直接轉矩控制系統的實驗裝置； （ 4 ）提出了基於sercos總線網路化分散式的直接轉矩控制系統， sercos （ serialrealtimecommunicationsystem ）是目前最適合同步和協調控制的串列實時通信協議； （ 5 ）基本勾勒出整個控制系統的硬體和軟體設計基本框架，詳細描述一些實驗中的具體的細節問題。
  17. The media enhancement extension to mips - i compatible isa is physically realized in the processor core, and improves media processing performance effectively ( 2 - 4x ) with negligible additional hardware cost ( 2. 7 % ). a finite state machine ( fsm ) based centralized control scheme is presented in this paper to supervise the cpu pipeline activity

    在系統晶元中媒體數字信號處理器核的設計中，在具體分析cpu流水線競爭和處理器異常的基礎上，本文提出並實現了一種基於有限狀態機的流水線運行控制方案，並從提高鐘頻和降低cpi值兩個方面優化處理器性能。
  18. The software controls the signal generator, which makes the brightness can be tracked. the software also controls the 12c bus interface. by setting the lcd tv ' s decoder, the software adjusts the white balance of the lcd tv

    白平衡系統的軟體控制白場信號發生器使得亮度可以自動跟蹤，軟體對cm - 7l送來的數據進行計算處理，並且根據處理的結果對i ~ 2c總線操作，修改液晶電視機內部解碼晶元中的數據達到白平衡調整的目的。
  19. 2. the control signals couple through the capacitance of the switches to the output, the dynamic error caused by the parasitic gate ? drain feedthrough capacitance is significantly lowered by the use of a reduced voltage swing at the input of the switches

    2 .差分開關的控制信號會通過晶體管的寄生電容耦合到輸出，從而影響dac的動態性能，設計中通過降低控制信號電壓的方法來解決這個問題。
  20. At the same time, it is nessary to shift the crossing point of the switch transistor ’ s differential control signals, in such a way that these transistors are never simultaneously in the off state

    同時，調低控制信號的交叉點，以防差分開關同時斷開影響dac的性能。 3 .研究了電流源晶體管的失配特性。
分享友人
分享到 Line

分享到臉書