步進寄存器 的英文怎麼說

中文拼音 [bùjìnjìcúnqì]
步進寄存器 英文
ste ing register
  • 步 : Ⅰ名詞1 （步度; 腳步） pace; step 2 （階段） stage; step 3 （地步; 境地） condition; situation; st...
  • 進 : 進構詞成分。
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 步進 : step by step步進操作 step by step operation; 步進傳動 step by step drive; 步進法 step by step met...
  1. Computer architecture, barcelona, spain, june 27 - july 1, 1998, pp. 282 - 292. 6 buyuktosunoglu a et al. a circuit level implementation of an adaptive issue queue for power - aware microprocessors

    2對位於第二級的發射隊列利用寄存器標簽進行多體劃分，更進一步減小發射隊列的大小和比較器的位寬。
  2. The goal of this thesis is to accomplish base - band channel coding / decoding, fh framing / de - framing and fh synchronization, and also to control the modulator and demodulator in the prototype system. all these functions are implemented with a tms320vc5409 dsp

    作為項目的一個重要組成部分，本文採用dsptms320vc5409實現了基帶處理部分的通道編解碼、跳頻意義的組拆幀和跳頻同步、並對調制解調晶元讀寫寄存器進行了配置。
  3. Abstract : the main points about development of application programs based on visa for vxibus are presented, including addressing an instrument, accessing a message - based device and a register - based device, handling events and errors. some practical programs are presented

    文摘:介紹了利用visa庫進行vxi總線編程的幾個要點，包括儀器的尋址、消息級器件的訪問、寄存器級器件的訪問、異步事件處理和出錯處理等，並給出了示常式序。
  4. To achieve this, an architectural power model for multi - port register - file is presented firstly. based this model, several practical optimization techniques are applied to reduce the power of register - file. the experimental results show that these techniques can reduce about half power of register - files in godson - 2

    並進一步提出通過減少偵聽浮點總線的項數以及減少指令立即數域的保存等方法減少發射隊列中相應部分的開銷，有效降低了面積和功耗; 4 .提出了物理寄存器堆的低功耗訪問方法。
  5. A design method based on the decomposition and multiplexing technique of complex instruction, combined the decoding arithmetic of instruction and a step counter together, sub - step realization method of multiclocks is proposed. the similarities and differences of architecture between fsm and multi - ? ocks are discussed from two aspects, timing and state space

    提出了執行周期復用的指令分解、指令寄存器與步長計數器聯合譯碼，以及多時鐘同步的控制流設計方法；進而從時間和狀態空間兩個角度深入討論了控制流設計中狀態機和多時鐘兩種常見體系結構的異同。
  6. Otherwise, as a memory component, large - scale register file holds a large number of data, so it requires stronger stability and validity. for memory components, using bist method to make a fault checking is a relatively good choice. but the bist of the multi - port register file is still in early phase of development

    另外作為存儲部件，規模大的寄存器文件現場保存量大，需要有很強的穩定性和正確性，而內建自測試是存儲部件進行故障檢測的較佳選擇;但是多埠寄存器文件的測試卻處在初始發展階段，故障模型和測試演算法都有待于進一步完善。
  7. Analyzing every part ’ s function and characteristic, i improve overflow control unit ’ s design technique to suit fpga design and traditional register exchange survivor managing algorithm. the system use input clock as system clock and use parallel structure in system to provide flexible speed

    採用適合fpga特點的溢出控制設計方法;改進傳統的寄存器交換法re （ registerexchange ）的倖存路徑管理設計方法;全系統採用輸入數據的同步時鐘作為系統時鐘，系統內部採用全并行的方式，以提供靈活的速度。
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