浮點運算系統 的英文怎麼說

中文拼音 [diǎnyùnsuàntǒng]
浮點運算系統 英文
fas floating point arithmetic system
  • : Ⅰ動詞1 (漂在液體表面) float; drift 2 [方言] (在水裡游) swim Ⅱ形容詞1 (在表面上的) superfici...
  • : Ⅰ名詞1 (液體的小滴) drop (of liquid) 2 (細小的痕跡) spot; dot; speck 3 (漢字的筆畫「、」)...
  • : Ⅰ動詞1 (物體位置不斷變化) move; revolve 2 (搬運; 運輸) carry; transport 3 (運用) use; wield...
  • : Ⅰ動詞1 (計算數目) calculate; reckon; compute; figure 2 (計算進去) include; count 3 (謀劃;計...
  • : 系動詞(打結; 扣) tie; fasten; do up; button up
  • : Ⅰ名詞1 (事物間連續的關系) interconnected system 2 (衣服等的筒狀部分) any tube shaped part of ...
  • 浮點 : [計算機] floating decimal; floating point
  • 運算 : [數學] operation; arithmetic; operating
  • 系統 : 1. (按一定關系組成的同類事物) system 2. (有條理的;有系統的) systematic
  1. The approximate computation method is used in float point computation of system ' s control algorithms on fixed - point dsp after comparing several methods in respect of running time and program space involved, which attains quick computation besides high precision and implements output voltaic with low harmonic and high control precision of frequency

    通過從行時間和佔用空間等方面比較在定dsp上實現的幾種方法,並選擇了近似計演法作為控制演的方法,在保證足夠計精度的前提下達到計的快速性,實現低諧波和頻率控制精度高的輸出電壓。
  2. In this paper, a lot of researches and exploration are applied to studying the universality and expansibility of hardware and the arithmetic design and code optimization of software. especially, all of the following arithmetics or conceptions are worked out in the research of software design : self - adaptable compression arithmetic based on dictionary model for data collection system, similarity full binary sort tree, a optimized quick search arithmetic and an improved arithmetic of multiplication in the floating - point operation. and all of the arithmetic are designed with mcs - 51 assembly language. the quick search arithmetic, in which merits of both binary search and sequence search are used fully, are based on the specialty of preorder traversal in similarity full binary sort tree

    特別在軟體設計研究中,提出了適用於數據採集的數據壓縮演法? ?基於字典模型的自適應壓縮演法;提出了類滿二叉排序樹的定義;提出了基於類滿二叉排序樹的先序遍歷特性的最優化快速查找演法,它充分利用了折半查找和順序查找各自的優;提出了乘法的改進演法;並在mcs - 51匯編語言層次上對所有的演法加以實現。
  3. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754標準的處理器的設計和異步串列通信核的設一浙江大學博士學位論文計,提出了適合硬體實現的乘除法、加減的結構,處理器主要用於高速fft處理功能,異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計,在討論可測試性設計策略選擇的問題上,提出了針對不同模塊進行的分別測試策略,提出了層次化jtag測試方法和掃描總線法,提出了基於fpga
  4. Binary floating - point arithmetic for microprocessor systmes

    微處理器的二進制
  5. Binary floating - point arithmetic for microprocessor systems

    微處理機的二進制
  6. This article deals with the method to determine the guard digit in the left normatlization of float point number in the analysis and design of computer system, and briefly introduces its application in practice

    摘要介紹了在計分析和設計中,用於數左規格化的警戒位的設置方法,並簡要說明了該類警戒位與用於舍入的警戒位共同組成了器中的累加器的實際警戒位字長。
  7. Become a kind of new electronics circuit - current - mode circuit. it is replacing the traditional design method of the voltage - mode in the high frequency high - speed signal processing realm 。 this thesis mainly discussed the modified second - generation current conveyors based on the current - mode kinds of new cuicuit components, they are stronger modified standard current - mode parts in fuctions on this foundation. mainly including the modified differential difference current conveyor ( mddccii ) 、 the fully balanced second generation current conveyor ( fbccii ) 、 ( full balances ) four - terminal floating nullor ( fbftfn ) and the current differencing buffered amplifier ( cdba ), they are all function very strong standard current - mode parts, they all can provide some circuit functions of better than general operation amplifier, because they have the voltage importation and the current importation, therefore use it since can carry out the voltage - mode signal processing circuit expediently, can also carry out the current - mode signal processing circuit expediently, and have to increase the benefit bandwidth to accumulate more widely than the voltage - mode, but have their advantages more according to the current - mode filter of the modified current conveyor, because it constitutes in brief, the filter wave function is stronger and they are better than in general use operation amplifier of many advantages, be easy to composing for example 、 high speed 、 frequency bandwidth 、 the power supply voltage requests low 、 consume small, the impedance is different from etc. advantages, otherwise they have biggish dynamic range, and flexible circuit synthesize, so they are the best active parts

    從第二代電流傳輸器ccii入手,重研究了以下幾種改進型的第二代電流傳輸器:改進的差動差分電流傳輸器mddccii 、全平衡第二代電流傳輸器fbccii 、多輸出四端地零器ftfn 、全平衡四端地零器fbftfn 、電流差分緩沖放大器cdba的電路結構及其模型。然後在此基礎上地研究了基於這幾種改進型的第二代電流傳輸器的濾波器的設計方法,主要方法和結果如下:利用mddccii設計了差分式連續時間電流模式低通、帶通濾波器;電流模式跳耦結構考爾低通濾波器;利用fbccii設計了帶通二階節濾波器及電流模式雙二階通用濾波器;設計了基於多輸出端ftfn的電流模式二階通用濾波器電路;通過數字化開關選擇的基於fbftfn的電流模式通用濾波器;設計了基於最少個數電流緩沖放大器(兩個cdba )的多功能通用電流模式濾波器及其在非理想因素情況下分析。設計濾波器的主要方法是採用級聯設計、模擬(信號流圖法)和反饋設計(跳耦法) 。
  8. The approximate computation method is used in float point computation of system ' s control algorithms after comparing several methods in respect of running time and program space involved, which attains quick computation besides high precision and implements excitation voltage with low harmonic and high control precision of frequency

    通過從行時間和佔用空間等方面比較實現的幾種方法,並選擇了近似計演法作為控制演的方法,在保證足夠計精度的前提下達到計的快速性,實現低諧波和頻率控制精度高的勵磁電壓。
  9. Coprocessor is a crucial part of high - speed and high - precision, whose performance directly affects the capabilities of system floating - point execution

    協處理器作為高速度和高精度的關鍵部件,其性能直接影響能力。
  10. It has many advantages because current domain operation offers greater ease for high frequency operation, low voltage operation, and wide dynamic range. simultaneously, the switched - current circuit is compatible with digital vlsi technology, which does not require the linear capacitors. and the switched - current integrator does not require the voltage operation amplifier

    開關電流電路是電流域模擬取樣數據,具有如下顯著優:高頻性能好,適于低壓工作,動態范圍大;不需要線性置電容,且與vlsi工藝兼容;不需要電壓放大器。
  11. Next, the techniques of dsp with high - speed and high - accurate and floating point processing are successfully applied in the area of microwave radio frequency identification

    首次成功地將高速、高精度、的數字信號處理技術應用於微波rfid中。
分享友人