現用處理器 的英文怎麼說

中文拼音 [xiànyòngchǔlǐqì]
現用處理器 英文
off the shelf processor
  • 現 : Ⅰ名詞1 （現在; 此刻） present; now; current; existing 2 （現款） cash; ready money Ⅱ副詞（臨時; ...
  • 用 : Ⅰ動詞1 （使用） use; employ; apply 2 （多用於否定: 需要） need 3 （敬辭: 吃; 喝） eat; drink Ⅱ名...
  • 處 : 處名詞1 （地方） place 2 （方面; 某一點） part; point 3 （機關或機關里一個部門） department; offi...
  • 理 : Ⅰ名詞1 （物質組織的條紋） texture; grain （in wood skin etc ） 2 （道理;事理） reason; logic; tru...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 用處 : use; good
  1. Dsp chip is especially fit for digital signal processing, its main application is realizing all kinds of digital siginal processing arithmetics such as clove hitch 、 correlation 、 all kinds of transforms etc. realizing digital filters with dsp is an important application

    Dsp晶元是一種特別適合於進行數字信號處理運算的微處理器，其主要應用是實時快速的實現各種數字信號處理演算法，如卷積、相關以及各種變換等。其中，利用dsp來實現數字濾波器就是很重要的一種應用。
  2. On the base of analyzing the development status and trend of the electromagnetic flowmeter technology, this article uses new mcu and ic to design the intelligent electromagnetic flowmeter that has a conversion instrument and a cumulation apparatus

    本文在分析國內外電磁流量計發展現狀和趨勢基礎上，採用新型微處理器和集成電路來開發集轉換器、積算儀於一體的智能電磁流量計。
  3. The soft core design of 16 - bit microprocessor realizes all the required functions, which are verified with fpga test bench ( for example, the controller is implemented with hard - wired logic ). with the design of the microprocessor some design ideas are implemented and some valuable experiences are accumulated

    本文是對微處理器設計中一些設計思想的實現（如採用硬布線邏輯來實現微處理器控制器） ，並積累了一些寶貴的設計經驗，可為其他設計提供有益的參考。
  4. Focusing on a 64 - bit high - performance general purpose microprocessor with fully independent intellectual property, the thesis investigates a 128 - word 65 - bit general register file with 12 - read and 8 - write ports which is a representational one for its large - scale and multi - port characteristics in that microprocessor, and realizes its full custom design with high speed in read and write access. from the layout simulation result, under the 0. 18um process, the upper limit working frequency for the register file is 900mhz

    本文面向一款具有完全自主知識產權的64位高性能通用處理器，對其中具有代表性的128字65位12讀埠和8寫埠的通用寄存器文件進行研究，實現了它的高速讀寫全定製設計，版圖模擬結果表明，在0 . 18um工藝下，設計可以工作的時鐘頻率上限為900mhz 。
  5. Different with traditional microprocessor which solves floating - point normalization with soft ware, the project implemented floating - point normalization with hard ware. the research focused on the architecture of microprocessor mainly

    因本課題意在實現微處理器的基本結構，並未涉及到編譯器，因此在對微處理器的浮點處理單元的規格化演算法進行深入分析的基礎上提出了用硬體實現浮點單元規格化的方法。
  6. With the reconfigurable computing systems, the time of convolution processing is reduced to a fortieth of the computing on common pc versus without of it

    X86可重構計算系統由通用處理器和現場可編程陣列邏輯組成，該系統應當稱為混合系統。
  7. < 4 > validates the designs of des / rsa on the reconfigurable system test board, and discusses the further optimized approach of the designs. the research results will be contributive to the reconfigurable computing research in the field of encryption application of our nat ion

    本課題的設計與實現以航空微電子中心的可重構計算系統為硬體環境，此系統由通用處理器和現場可編程陣列邏輯組成，是混合系統，在當前一些應用領域如嵌入式微處理器系統等具有非常看好的應用前景。
  8. A vlsi very large scale integration architecture is also proposed to implement the improved motion estimation algorithm. experimental results show that this algorithm - hardware co - design gives better tradeoff of gate - count and throughput than the existing ones and is a proper solution for the variable block size motion estimation in avs

    考慮到avs主要面向圖像尺寸較大的高清數字電視壓縮，這種高復雜度的運算已經超過了現有通用處理器的運算能力，因此有必要設計專門的快速演算法和與這種演算法相匹配的硬體加速器。
  9. After analyzing the characteristic of the parallel processing system, some problems about design missile - carrying processing system are pointed out ; network in the parallel processing system has become bottleneck and affect the performance of system, so the processing efficiency is analyzed in a multiprocessor system based on cluster - bus and some rules in designing the network in the multiprocessor system are brought out ; genetic algorithm is used for scheduling in the multiprocessor system, and a scheduling algorithm is described to suit arbitrary number of tasks, unequal task processing time, arbitrary precedence relation among tasks and arbitrary number of parallel processor, so that the schedule length will be minimized ; finally, an atr algorithm is mapped to a ring multiprocessor system, and a block diagram using dsp device is constructed. in chapter 4, the study is performed on real - time system hardware realization of atr. tms320c80 is selected as the kernel processor in multiprocessor system

    為此，對一種由常用的dsp晶元組成的多處理器系統的處理器利用率進行了分析，提出了多處理器系統互連網路設計的基本原則；本章使用遺傳演算法作為實現多處理器調度的工具，提出了一種新的任務調度演算法，該演算法主要是為了解決在任務數任意、任務計算時間不相等、任務前趨關系任意、以及任務間存在通信和考慮任務存貯器要求的情況下，如何優化任務在各個處理器上的分配和執行順序，使得多處理器系統總的執行時間最小；最後對一個目標識別演算法進行了硬體實現優化分析，根據分析結果，將演算法映射到由dsp晶元組成的環形網路連接的處理器拓撲結構上，得到了多處理器系統的原理框圖。
  10. And it has significance in multimedia communication, digital multimedia broadcast and portable consumer electronics etc. the real - time implementation of video coding requires very high computation power and memory bandwidth

    它面向移動多媒體應用，對新一代移動多媒體通信、數字多媒體廣播、便攜式視聽消費電子產品等產業的發展具有重要意義。數字視頻數據壓縮的實時實現對處理器的計算能力和帶寬要求很高。
  11. With the development of general - purpose processors and high efficient algorithms, it is possible to implement a software - based real - time video encoder, and its low cost and easy upgradability attract developers " interests to migrate video encoding from dedicated hardware to more flexible software

    對于實時視頻應用環境，視頻編碼以往大多由專用設備完成。但隨著通用處理器和數字信號處理器（ dsp ）主頻的提高、面向視頻處理的指令集出現，使得更為經濟、靈活的軟體編碼成為可能。
  12. It does this by dividing the available processor time among the threads that need it, allocating a processor time slice to each thread one after another

    它通過以下方式實現這一點：在需要處理器時間的線程之間分割可用處理器時間，並輪流為每個線程分配處理器時間片。
  13. At present, the research productions of reconfigurable computing are basically composed of fpga and general - purpose processor. and the complicated computations will be disposed within fpga

    目前大多數可重構計算技術的研究成果基本由現場可編程門陣列器件fpga和通用處理器構成，由可編程器件提供對復雜運算的加速計算能力。
  14. Reconfigurable computing has become a subject of a great deal of research. its key feature is the ability to have high performance of special - purpose processors, while retaining much of the flexibility of general - purpose processors

    結合了通用處理器和專用處理器二者的優點，在概念上既有asic一樣高效硬體電路實現也有類似於通用處理器的靈活性。
  15. This paper does a research into the measures of dsp ' s c - compiler design. after comparing the dsp with risc processor in the respects of structure and application, and referring to the classic theory of compile for the general - purpose processors, some feasible schemes for dsp ' s c - compiler design are given along with some optimization strategies suitable to the dsp ' s feature

    本文對dsp晶元的c編譯器設計進行了探討性的研究，通過對dsp和通用處理器的在結構和應用等方面的對比給出一些可行的c編譯設計的實現方法並借鑒傳統的編譯優化理論結合dsp結構和應用特性得出一些與dsp相適應的編譯優化策略。
  16. In order to unify transducer module and standard of transducer interface, institute of electrical and electronics engineers ( ieee ) and national institute of standards and technology ( nist ) do lots of work to constitute the standard of ieee1451 network smart transducer interface in 1997, the standard contain seven independency and unification protocol

    國際電子電氣工程師協會組織制定的ieee1451協議族，使得各種傳感器和現場總線網路應用處理器實現無縫連接，達到不同廠商的網路化智能傳感器之間的互操作性和互換性。本文對ieee1451 . 2協議標準及依據該標準設計的傳感器模塊進行了研究。
  17. General - purpose processor is not competent for it. on the other hand, hardware implementation is difficult to develop and lacks of scalability

    通用處理器很難勝任，基於硬體實現的asic方式開發難度大，缺乏靈活性。
  18. Its key feature is the ability to perform computations in hardware to increase performance, while retaining much of the flexibility of a software solution

    通用處理器非常適合於實現盡可能多的運算，設計目標專注于處理器快速順序執行一條指令的能力。
  19. A method called montgomery modular multiplication is the most significant way of fast modular multiplication. the montgomery method and its improvements are studied and the performances are analyzed in this thesis

    對于加快模乘法速度的方法，本文重點分析peterl . montgomery提出的及其改進演算法，介紹和比較了montgomery模乘演算法實現上的分類，找出了較為優越的應用於通用處理器上的montgomery模乘演算法。
  20. With the advancement of vlsi design and the scaling of technology, the number of high performance processor is surging. not only does the performance of the processors is scaling up complying with the moore ' s law, but also the processors are get widely adopted in all kinds of application systems

    隨著vlsi技術的高速發展，工藝水平的不斷提高，各種高性能的處理器不斷涌現，不僅僅是通用處理器的性能指標按摩爾級數遞增，在各種應用系統中，嵌入式處理器也得到了充分的發展。
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