生成電路 的英文怎麼說

中文拼音 [shēngchéngdiànlù]
生成電路 英文
creation of circuitry
  • 生 : Ⅰ動詞1 （生育; 生殖） give birth to; bear 2 （出生） be born 3 （生長） grow 4 （生存; 活） live;...
  • 成 : Ⅰ動詞1 （完成; 成功） accomplish; succeed 2 （成為; 變為） become; turn into 3 （成全） help comp...
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 生成 : create; generate; produce生成演算法 generating algorithm; 生成文法 generating grammar; 生成物 pro...
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. Computer - aided manufacturing ( cam ) refers to how to use computer technology effectively through direct or indirect combining computer and material resources manpower resources of one enterprise, in such aspect as plan, management, cantonment, operation, etc. when cam is used in integrated circuit ( ic ) manufacturing, we call it ic - cam

    計算機輔助製造（ cam ）是指通過直接或者間接把計算機與企業的物力和人力資源聯系起來，在生產的計劃、管理、控制和操作等方面有效地應用計算機技術。計算機輔助製造應用在集成電路生產製造上就稱之為ic - cam 。
  2. Manufacturer of confectionery, certified to iso 9001, 2000 standards

    -批發世界知名廠商生產的dip和smd集成電路。
  3. Two other effects are transient phenomenon called single event upset ( seu ) and single event latchup ( sel ). in this paper, some means to harden the devices against these phenomena are used. guard banding around nmos and pmos transistors greatly reduces the susceptibility of cmos circuits to lachup

    在本文設計中，採用雙環保護結構，大大的降低了cmos集成電路對單粒子閂鎖效應的敏感性；對nmos管採用環型柵結構代替傳統的雙邊器件結構，消除了輻射感生邊緣寄生晶體管漏電效應；採用附加晶體管的冗餘鎖存結構，減輕了單粒子翻轉效應的影響。
  4. These defects appear during crystal growth, but crystals having such defects are not considered usable for ic manufacture and are discarded.

    這些缺陷在晶體生長時出現，有這類缺陷的晶體不能用於集成電路製造，應報廢。
  5. Integrated circuit has had a very significant impact on digital system development.

    集成電路的出現與發展使數字系統的設計工作發生了巨大的變化。
  6. With the developing of vlsi in recent years, high function dsp has been produced ( such as tms320 series dsp produced by ti ) and their cost is dropping. thus, this established the foundation for making complex speech coder practical and producible. the paper researched and discussed the fix - point real implementation of g. 728 by dsp tms320c5402 chip

    但是，近幾年來，隨著大規模集成電路（ vlsi ）的發展，已生產出高性能數字信號處理晶元（例如ti的tms320系列dsp晶元） ，而且其成本在不斷降低，這就為復雜的語音編碼器的實用化和產品化奠定了基礎。
  7. As the ic manufacturing process develops from sub - micron to very deep submicron ( vdsm ) technologies, with current lithography tools ( 248nm and 193nm ), foundries can not manufacture products that designs want because of so - called optical proximity effect ( ope )

    當集成電路生產工藝發展到納米級時，利用現有的曝光設備（ 248nm和193nm ） ，由於所謂的光學鄰近效應，集成電路製造廠商已經無法製造出滿足電路功能要求的產品。
  8. Since low voltnge, low power cmos analogy circuit and current - mode analogy integrated circuit have so many advaotages, it has become most appealing for vlsi t6chnique theorotical scholar and design engineel filter is an important unit of analog integrated circuit, whose structue construction and design method can estend to the design of large scale " ana1og integrated circuit.

    低電壓、低功率cmos模擬電路與電流模式集成電路由於具有諸多的優點而成為當前vlsi技術理論工作者和設計工程師所關注的熱點。模擬濾波器作為模擬集成電路的重要單元，其結構生成方法和電路設計方法可推廣至大規模集成電路設計，具有重要的參考價值和實際應用價值。
  9. Astri s initial research programmes focus on photonics, integrated circuit design, internet software, wireless communications and biotechnology

    應科院的初步研究范疇包括光電子、集成電路設計、網際網路軟體、無線通訊和生物科技。
  10. Strained - soi mosfet, which appears recently, takes both the advantages of soi ( silicon on insulator ) and sige ( silicon germanium ). it has shown advantages over bulk sample in enhanced carriers mobility, as well as higher transconductance, stronger drive capability and reduced parasitic capacitances. these properties make it a promising candidate for improving the performance of microelectronics devices

    Strained - soimosfet是最近幾年才出現的新型器件，它將soi材料和sige材料結合在一起，與傳統體硅器件相比，表現出載流子遷移率高、電流驅動能力強、跨導大、寄生效應小等優勢，特別適用於高性能、高速度、低功耗超大規模集成電路。
  11. A novel low mechanical hysteretic ceramic capacitive pressure transducer has been made, by using of ceramic sealing technology ; integrate circuit ( ic ) technology and thick film plane fixing circuit technology. this transducer is made of a deformable ceramic diaphragm and a ceramic base plate, between which has an air cavum. a coaxial gold electrode was fired onto the diaphragm and the base plate

    本文利用新型陶瓷技術、集成電路技術和厚膜平面安裝電路技術，採用零力學滯后的陶瓷和陶瓷密封材料進行設計製造了一種非充液乾式的電容式壓力傳感器，該壓力傳感器由較厚的陶瓷基體和較薄的陶瓷膜片構成，中間形成一空氣介質腔，在基座和膜片之間內置同軸的雙電極，組成兩個電容，當膜片承受壓力時發生位移，使電容量產生變化，經後置處理電路直接轉換為可輸出的直流電壓信號。
  12. Eddy - current sensor conversion circuit consist amplification circuit, band - pass filter circuit, demodulation circuit, differentiation phase and data sampling circuit. these circuits are used to convert the test signal of eddy - current sensor to discrete signal tend to process. the microprocessor system that formed of dsp chip is used to data fitting of test system, data displaying and data communicating with personal computer, etc. the interference questions of hardware design and the measure of eliminating interference signal in the subject are introduced in the last of this chapter

    硬體電路的設計主要分三大部分來實現：激勵源電路部分，由分頻電路和頻率合成電路組成，產生頻率穩定的激勵信號以確保檢測任務的正常進行；傳感器變換電路部分，由放大電路、濾波電路、檢波電路、鑒相電路和數據採集電路組成，主要將電渦流傳感器檢測線圈檢測到的信號變換成只含有被測信息的離散信號，易於后續電路處理；由dsp晶元構成的微處理系統，主要完成檢測系統的數據擬合、顯示及與主機通信等功能。
  13. The macro model of drift region resistance was established based on the solution of poisson ’ s equations and continuity equations. by the combination of spice mos ( level = 3 ) and the macro model, the complete dddmos model was then obtained, which accords well with simulated data. by simulating and comparing different devices of different process parameters, the model is applicable for different bias regions and can be useful in the power integrated circuit research in future

    首先介紹了器件建模的基本原理及相關模擬技術，然後利用工藝模擬軟體生成器件基本結構，並對其基本特性進行了分析;分析了業內和學術界比較通用的高壓器件建模的方法，隨后在模擬實驗的基礎上著重分析了dddmos的物理特性，在求解泊松方程、連續性方程等基本方程的基礎上，建立有物理意義的漂移區電阻的宏模型;隨后結合spicemos （ level = 3 ）模型而得到完整的dddmos模型，此模型與模擬數據符合得比較好，通過對不同工藝參數的器件進行模擬比較，該模型能夠覆蓋不同的工作偏壓范圍，具有較明確的物理意義，對今後的功率集成電路的研發有一定的參考意義。
  14. Major producers of electrical and electronic ceramics, engineering ceramics, ceramic thick - film integrated circuits, ceramics molybdenum, manganese, tungsten metal manganese, ceramic packages such as ceramics pieces

    主要生產電子電器陶瓷、工程陶瓷、陶瓷厚膜集成電路、陶瓷鉬錳、鎢錳金屬化、陶瓷封裝外殼等各種陶瓷瓷件。
  15. Semiconductor devices - integrated circuits - hybrid integrated circuits and film structures - manufacturing line certification - generic specification

    半導體器件.集成電路.混合集成電路和薄膜結構.生產線認證.總規范
  16. Semiconductor devices - integrated circuits - hybrid integrated circuits and film structures - manufacturing line certification - blank detail specification

    半導體器件.集成電路.混合集成電路和薄膜結構.生產線認證.空白詳細規范
  17. Secondly, we prove the self - relation function and correlation function of pseudo noise code sequence and obtain the shift register generating circuit from it ' s generating function

    然後，通過偽碼的生成多項式，導出偽碼的移位寄存器生成電路，並分析了偽碼的自相關特性和互相關特性。
  18. Owing to fact that at present 155 mbits and 2 mbits trunks coexist in the switching network and the latter has a larger share, and traffic has to go through several sdh rings in the transmission network, it is necessary to develop stringent management procedures in configuring the circuits and carry out all - length tests

    由於目前交換網155mbits中繼和2mbits中繼並存，並且仍以2mbits為主，在傳輸網路中要通過多個sdh環，在配置電路時，要有嚴格的管理程序，在傳輸生成電路時，全程測試是不可忽視的環節。
  19. Abstract : constant components and output opened ports in the result of high - level synthesis lead to explicit redundancy in gate - level technology mapping. explicit redundancy can not improve the performance, but increases power consumption, enlarges circuit area and decreases its testability, so it should be removed. this paper proposes a queue loop optimization algorithm to remove explicit redundancy completely which decreases the circuit area and improves the testability

    文摘:高級綜合結果中常量元件和輸出懸空埠導致門級工藝映射結果中存在顯式冗餘.顯式冗餘無助於提高電路性能，反而增加功耗，降低電路的可測試性，使電路面積增大，應予消除.文中提出了顯式冗餘的隊列循環優化演算法，完全消除了此類冗餘，從而有效地減少了生成電路的基片面積，提高了電路的可測試性
  20. It has been playing an important role in equipping all kinds of arms and services for campaigns, tactical exercises and emergent actions etc. based on the detailed analysis of the exchange ' s architecture and implementing, this thesis points out some disadvantages of the device, such as too many absolute components, not very high enough reliability and security, very large size and weight, operating and maintaining difficultly. considering low power requirement and man - machine interface optimizing design at the same time, the thesis come up with an integrated design scheme to the previous device based on " mcu + cpld / fpga architecture " : ( 1 ) signal frequency dividing, timing frequency producing, 20 customers " led states controlling are implemented in cpld ; ( 2 ) decoding, latching data and controlling signals are implemented in cpld by bus interface between mcu and cpld ; ( 3 ) chip selecting principles and mcu idle mode design are completed under the consideration of low power requirement ; ( 4 ) operation by chinese lcd menus is adopted in the man - machine interface

    本項目以該交換機為研究對象，在詳細分析原設備的系統結構和功能實現方式的基礎上，指出該機型在使用過程中存在技術相對陳舊、分立元件過多、可靠性和保密性不夠、體積大、重量大、維修困難等問題，同時結合系統的低功耗需求和優化人機介面設計，本文提出基於「單片機+ cpld fpga體系結構」的集成化設計方案：在cpld中實現信號音分頻和計時頻率生成電路、 20路用戶led狀態控制電路； cpld與單片機以總線介面方式實現譯碼、數據和控制信號鎖存功能的vhdl設計；基於低功耗設計的器件選型方案和單片機待機模式設計；人機介面的lcd菜單操作方式。
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