硬演算法 的英文怎麼說

中文拼音 [yìngyǎnsuànfǎ]
硬演算法 英文
brute force method
  • 硬 : 形容詞1 （堅硬） hard; stiff; tough 2 （剛強; 堅定; 強硬） strong; firm; tough; obstinate 3 （勉...
  • 演 : 動詞1 （演變; 演化） develop; evolve 2 （發揮） deduce; elaborate 3 （依照程式練習或計算） drill;...
  • 算 : Ⅰ動詞1 （計算數目） calculate; reckon; compute; figure 2 （計算進去） include; count 3 （謀劃;計...
  • 法 : Ⅰ名詞1 （由國家制定或認可的行為規則的總稱） law 2 （方法; 方式） way; method; mode; means 3 （標...
  1. New s - boxes for hardware implementation of aes

    適合aes演算法硬體實現的新s盒
  2. The hardware of the ip phone codec to be designed is based on the fixed point digital signal processor ( ti ' s tms320vc5410 ) while the compression and decompression core in the software of dsp is based on the itu - t vg. 729a. ip phone codec carryout the task of collecting / playing - back. coding / decoding of speech signal and communication with embedded cpu. etc

    該語音編解碼器的硬體基於tms320vc5410 ，編解碼演算法遵循itu - tg . 729a協議，能夠實現語音信號的採集/回放、編碼/解碼以及同嵌入式cpu通信等功能，在8kbit / s的碼率下能夠提供獲得良好的語音質量。
  3. According to the research, the major work done is as following : < 1 > analyzes the symmetric - key encryption algorithm des and dissymmetric - key encryption algorithm rsa, and makes them easy to realize in hardware. < 2 > according to the algorithms and the thought of reconfigurable computing, the dissertation accomplishes the design of 64 - bit des system architecture and the design of 256 - bit ~ 1024 - bit rsa system architecture. < 3 > using the top - down high level design methodology and the hdl language, accomplishes the description of the des / rsa designs, the simulation and the synthesis

    本論文主要的研究工作： < 1 >對現有的對稱加密演算法des演算法和非對稱加密演算法rsa演算法進行分析，使其易用硬體實現； < 2 >基於可重構思想和特點，完成64位des演算法和256位1024位模長rsa演算法的可重構硬體的設計； < 3 >採用自頂向下的設計方法，利用hdl語言對des / rsa設計進行功能描述，並完成軟體模擬，綜合和布線； < 4 >在可重構計算驗證平臺上進行演算法驗證，並對設計的可重構和設計的進一步優化進行討論。
  4. In this thesis first the research the sr - df algorithm under the arbitrariness antenna array, which is based on the algorithm of music, second the algorithm has been put into realization on the hardware, so that in the later to embattle the antenna can reference to this thesis

    本課題對比較適合的任意形狀天線陣進行了研究，在趨于成熟的music演算法的基礎上，研究任意形狀超分辨測向天線陣通用演算法，然後對該演算法進行硬體的實現。
  5. Monitor apparatus can measure valid value of three phase voltage and current, power factor, three phase disequilibrium, instant flecker of short time and harmonic without twenty, degree and harmonic distortion total. the paper are laid on the following. ( 1 ) master plan and function of circuit, ( 2 ) hardware design including circuit and principle of a / d conversion, phase lock, liquid crystal display and keystroke and so on, ( 3 ) design of system software including digital filtering, fft, a / d conversion and monitor interface of pc, ( 4 ) system test

    監測儀能夠完成包括三相電壓、三相電流的有效值、功率因數、三相不平衡、電壓短期閃變、以及20次內的諧波、諧波相位、諧波失真總量等的測量。論文重點介紹了以下幾部分： （ 1 ）電路的總體設計和功能； （ 2 ）硬體設計，包括a d轉換、鎖相環、液晶顯示和按鍵輸入等原理和電路。 （ 3 ）系統軟體設計，包括a d轉換、 fft 、數字濾波等程序的原理和演算法以及上位機監控界面的設計； （ 4 ）系統測試。
  6. In all kinds of complicated network, oriented linking and unlinking, communication frequency resource is strained, and bandwith to transmitting audio frequency signal is too restricted, complicated and fluky, while audio frequency data exponential have been increased in the last several years. under the circumstances, based on the research of predecessor, this paper studies wavelet analysis ' s maths gist and practices significance on signal process, and puts forward a optimized wavelet package condensation arithmetic to process audio frequency data, which gives attention to coding efficiency, multirate and compression delay. simulation experiment on the arithmetic has been done by matlab

    針對無連接和面向連接的各種復雜網路環境下，通信頻帶資源緊張，音頻傳輸帶寬有限且復雜多變，而各種音頻數據又日益增多的局面，本文研究小波分析在信號處理方面的數學依據和在數據壓縮方面的實際意義，在前人不斷工作的基礎上，提出了一種優化小波包變換編碼方案用於音頻數據的壓縮演算法，兼考慮了編碼效率、多碼率和壓縮時延多個方面，並在matlab環境下做了模擬實驗，對各種音頻信號及多種小波函數做了模擬結果比較，實驗結果證明該演算法可以在一定計算復雜度下可以很好地改進壓縮效果，達到多碼率下實現實時編解碼的過程，在高速dsp晶元等硬體設備支持下，可以有效應用於實際復雜多變信源編碼。
  7. Thus, the vhdl is carried to make a design for the forenamed algorithms, and the design is validated by simulation

    因此，本文用vhdl語言實現了ca邊緣檢測演算法模型的基本內核設計，並通過時序模擬，進行了演算法的硬體設計與效果驗證。
  8. After deeply investigate and analysis, we found the drawback of clique lies in its inconsideration of the characteristic of the data being processed. it grid the data into a predefined grid and this adds up to the complexity of the computation. then it has to degrade the accuracy of the result to degrade the complexity of computation,

    通過深入的研究和分析，發現由於clique演算法沒有考慮到如何利用當前挖掘數據的特性，而是進行一種硬性的網格劃分，因此增加了計算復雜程度，而為了降低計算的復雜程度就只能降低聚類結果的精確性。
  9. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  10. In this paper, the operation theory is ntroduced. we research the quasi. synchronous alternative sampling echnology in detail to improve the precision of the instrument and discuss some problem about the plication of this method. we introduce the develop of hardware and software in the whole instrument. at last, we sive out the result of experiment and the analyses of error

    文中論述了該電參數測量儀的工作原理，著重研究了提高測量精度的準同步采樣演算法，並討論了該演算法在單片機中應用的幾個實際問題。在此基礎上，詳細介紹了整個儀器的軟硬體開發過程。最後對儀器進行了實驗和誤差分析，給出了實驗結果和誤差分析結果。
  11. The examination indicates the preprocessing algorithm is realizable and effective

    通過演算法在硬體上的實現，證明了演算法的有效性。
  12. In the thesis, a good performance is gained with implement four 256 state machines by making good use of residuary block ram in fpga chip. in present dissertation, ts sync flag is got rapid - extract by software and hardware cooperation and whether packet length is 188 or 204 bytes also is distinguished

    在硬體實現的過程中，對傳統da演算法進行了深入研究，充分利用fpga片內剩餘ram塊，實現4個256狀態的狀態機，採用軟硬體協作的方法快速提取同步位元組，自動區分包類型是188位元組長還是204位元組長。
  13. In this equipment, a mcu controller is responsible for digital image acquisition, realized stable data transmission between different running frequency units. the whole algorithm is simulated and optimized on dsp evm board and ccs environment, which contribute to a seamless software transplant and hardware structure design

    通過中斷機制，實現數據的可靠傳輸，在dspevm板環境下，對演算法程序進行優化和比較，完成演算法模擬測試，實現軟體無縫移植和硬體的結構化設計。
  14. Due to the hardware characteristic ' s limitation, such as the poor speed of a / d, d / a conversion and dsp process, the most part of sr system adopt middle course. that is to say, by using the special digital converter or running relevant arithmetic, it converts the radio signal to intermediate frequency signal and completes the base - band signal process that is n ' t the veriest sr and is named " software defined radio ( sdr ) "

    由於受到硬體性能如a d 、 d a及dsp晶元處理速度的限制，目前的軟體無線電系統多採用折中的實現方案，增加專用的數字變頻器或者運行數字變頻演算法，將射頻信號變頻到中頻，然後再進行基帶信號處理，這樣的軟體無線電系統又被稱之為「軟體定義無線電」 ，它並不是真正意義上的軟體無線電。
  15. In order to remedy the faults of the traditional pipe - leak detector based on the straight - correlation analysis method which has high demand for hardware and high price, the pipe - leak detector based on the polarity correlation algorithm with the cross - zero method is presented, the hardware design and the test is finished, the result only with the error from 1 % to 3 % is gained, and its feasibility is testifies

    針對採用直接相關法的傳統相關測漏儀對硬體要求高、價格較貴的缺點，將極性相關的過零演算法應用於相關測漏，並設計了硬體結構，進行了實驗模擬，在實驗室條件下，測量誤差約為1 % ~ 3 % ，驗證了其可行性。
  16. Survey for hardware realization of ant colony algorithm

    蟻群演算法硬體實現的研究進展
  17. Secondly, the paper describe the principle of atm network, and the function of ' sar " ( segmentation and reassembly ) and the format of packet aal5, and introduce the basic idea of ipoa, and the design project and implementing of the control chip. later, the paper introduce the logic function and operational principle of packet buffer control chip and prove the feasibity and correctness of the arithmetic. at last the paper introduce crc - 32 arithmetic based on look up and implement it with hardware

    接著詳細論述了核心路由器atm網路實現的原理，包括「 sar 」 （ segmentationandreassembly ）功能和aal5報文的格式， ipoa基本思想，以及控制晶元的設計方案和實現途徑等。然後又論述報文緩存區控制晶元的工作原理和邏輯功能等，並對演算法的可行性，正確性等進行論證。最後介紹了一種基於查表的crc - 32演算法的原理及其硬體實現。
  18. In this paper, computerized algorithm of three - phase sudden - short - circuit is also deeply studied by building software - hardware platform

    本文在構建的軟硬體平臺上又深入研究了三相突然短路試驗的計算機演算法。
  19. To decimators of multi - level system designed based on the hb filter and cic filter, analysis of the filter design parameters involved, whose theory applied to multi - level cic filter of design, and designed half band filter with distributed algorithms. compared to the simulation results. these advanced algorithms applications, and further increase hardware efficiency and operating speed

    對于基於積分梳狀（ cic ）濾波器和半帶（ hb ）濾波器的多級系統設計的抽取濾波器組，分析了濾波器設計中所涉及的各個參數，將剪除理論應用於多級積分梳狀（ cic ）濾波器的設計中，並且採用分散式演算法（ da ）來設計半帶（ hb ）濾波器，並對模擬結果進行比較，這些先進演算法的應用，進一步提高了硬體效率和運行速度。
  20. At last the algorithm of ddmf is achieved by the investigation tool of altera company ? quartus ii and the vhdl language, and its ip core is also achieved which is used not only in the satellite navigation position system, but also in the long pn code dsss system. ddmf investigated in the dissertation gives a good way to design the rapid pn code acquisition in the beidou project, and the technology has the definite theory and practice significance

    此外還應用altera公司的最新的fpga開發工具quartusiiv5 . 1 ，採用了國際標準的硬體描述語言? vhdl語言，對數字差動匹配濾波器和傳統匹配濾波器演算法予以實現，開發了該演算法的軟ip核，可以對所應用的擴頻碼長度， a / d采樣后的數據量化階數，所用擴頻碼等可進行隨意改寫。
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