碼分測試臺 的英文怎麼說

中文拼音 [mǎfēncèshìtái]
碼分測試臺 英文
code division testbed （codit）
  • 碼 : Ⅰ名詞（表示數目的符號或用具） a sign or object indicating number; code Ⅱ量詞1 （指一件事或一類的...
  • 分 : 分Ⅰ名詞1. （成分） component 2. （職責和權利的限度） what is within one's duty or rights Ⅱ同 「份」Ⅲ動詞[書面語] （料想） judge
  • 測 : 動詞1. （測量） survey; fathom; measure 2. （測度; 推測） conjecture; infer
  • 試 : 名詞（古代占卜用的器具） astrolabe
  • 臺 : 臺名詞（指臺州） short for taizhou （in zhejiang province）
  • 測試 : test; testing; checkout; measurement
  1. The hardware is composed of digital luminometer, rotate encoder, step motor and data acquisition card, solenoid - operated clutches. the software is developed in visual c + + 6. 0 which is an oop programming environment and has plenty of resource to use. this system can implement high speed, automatic measurement

    課題對測定系統進行了總體設計，硬體部分由數字照度計、旋轉編碼器、步進電機、電磁離合器等組成，軟體部分利用acl - 8216數據採集卡，以vc + + 6 . 0作為軟體開發平臺，充分利用vc + + 6 . 0生成友好界面的優勢和acl - 8216的資源，開發出了測試系統。
  2. It makes use of resource of the chip, realizes the development of every module, achieves distilling of telegraphese, builds up new frame, calculates the position and provides external interface. in the section of calculating the position, the author combines the two measures of carrier phase position and code position. finally, in the platform of matlab, the author completes the function simulation of main modules

    概述了接收機的設計原理;詳細描述了基於ti公司的tms320c6713dsp晶元的系統程序設計中各模塊的實現，利用該晶元的資源，實現各模塊的調度，完成對導航電文的提取，重新組幀，定位解算以及對外介面;在解算部分，把載波相位定位與碼測距定位相結合，利用載波相位對偽距的平滑來提高定位精度;在matlab平臺下進行了各模塊的功能模擬測試，以模擬結果的圖表來分析說明了載波相位平滑偽距的兩種演算法能使定位精度有一定的提高。
  3. In the project of constructing the platform, the design of the time - domian synchronization algorithm is in the charge of me, which has been realized on fpga. it is introduced detailedly in chapter 3 and chapter 4. additionally, the design of ldpc decoder based on fpga is another part of the project

    介於本人在該項目中的主要工作是時域同步演算法設計及fpga實現和ldpc碼譯碼器的fpga設計，在文章的第三章將系統的介紹測試平臺時域同步的演算法設計過程及matlab模擬分析，第四章將介紹時域同步的fpga設計、模擬及硬體調試。
  4. In the modulation / demodulation circuits, cpld is selected as platform of the digital logic part, which includes series - shunt / shunt - series transform, difference coding and sample verdict

    調制/解調電路中，串並/並串變換、差分編/解碼和抽樣判決等數字邏輯部分是以cpld作為開發平臺，論文給出了實現上述功能的vhdl程序及模擬、測試結果。
  5. This master ’ s degree thesis firstly introduces and discusses the principle of ofdm and the merged blue print for digital terrestrial television broadcasting in china, then proposes a scheme for the test platform of narrowband ldpc decoding efficiency based on fpga. this scheme includes techniques such as time - domain synchronization using pn and power estimation using pilots

    本論文首先介紹並討論了數字電視傳輸標準tds - ofdm的實現原理，對其中的一些關鍵問題做了詳細的分析，在此基礎上提出了一種基於fpga的窄帶ldpc解碼-誤碼測試平臺設計方案，即利用時域pn頭同步及頻域導頻進行功率估計的fpga設計。
  6. With the computer controlling the output of the digital signals and the analog signals, controls and adjusts startup, stop, turn and rotational rapidity of the transducer - electromotor and the strength of brake actuator ; installs the torque sensor on dynamical axis, and installs the encoder on non - dynamical axis of the dimensional globoidal indexing cam mechanism ; utilizes the virtual instrument language labview development the test and control system, with the computer real - time monitoring, late displays and storages the data of the test, and processes the data and analyses it

    利用計算機控制數字量輸出和模擬量輸出來達到控制和調節變頻電機啟停、轉向、轉速;控制制動器的啟停和加載力;在弧面分度凸輪的加載軸和空軸上安裝扭矩傳感器和編碼器;應用虛擬儀器語言labview開發試驗臺的測控軟體系統，用計算機進行實時監測與事後顯示與存儲，並進行信號處理與分析。
  7. In order to meet to the higher timing precision of the low frequency time - code timing terminal, the applications of dsp ( digital signal processing technology ) in the time service is researched in this paper. the main works and contributions can be summarized as follows : ( l ) the low frequency signal transmission and dsp technology are discussed. according to the system needs, a testing flat of low frequency time - code based on dsp is built up

    本論文的工作針對低頻時碼授時高端用戶的定時需求，對數字信號處理（ dsp ）這一新型技術在該領域應用進行了探索性研究，主要完成和開展了如下工作： （ 1 ）研究分析了低頻通道和dsp技術，根據系統要求，從硬體上實現了基於dsp晶元的低頻時碼信號的採集測試平臺。
  8. At first, the article describes the basic concept of testbench ; summaries general function verification approaches : white - box verification, black - box verification, and grey - box verification, and shows their different application situations ; examples general verification tools : linting tools, code review, simulator, waveform viewer and code coverage. after doing that, it discusses how to analysis the granularity for verification and how to specify the verification, and details the construct relations between verification specification, testcase and testbench

    本文首先闡述了測試平臺的基本概念；歸納了常用的功能測試方法：白箱測試、黑箱測試和灰箱測試，並說明了其不同的應用場合；列舉了常用的測試工具：代碼靜態分析工具、代碼檢查、模擬器、示波器和代碼覆蓋；接著討論了如何在測試計劃中分析測試粒度、確定待測特徵；闡明了待測特徵、測試實例和測試平臺之間的結構關系。
  9. In this dissertation, the theory and characters of mimo and stc are both studied. then, the outfield testing work is carried out based on the mimo testing equipments

    本文研究了mimo技術的原理和特點，分析了空時碼的編譯碼原理，並完成了基於mimo試驗平臺的外場測試。
  10. With a combination of the design principles and characteristics of pdsn, a method for compressing data packet using mppc compressing algorithm is put forward. after studying ppp protocol and mppc compressing standards, an algorithm using packet matching sliding window buffer to code and decode is provided. considering not making a great change of current pdsn system, a mppc compressing module is designed and the function to compress data packet through vxworks platform is implemented

    作者首先闡述了pdsn系統的工作原理和系統結構，對移動用戶與pdsn之間的數據傳輸進行了分析，並結合pdsn系統的設計原理和特點採用mppc壓縮演算法對數據報文內容進行壓縮;然後闡述了ppp （ pointtopointprotocol :點對點協議）協議和mppc壓縮標準，採用報文匹配的滑動窗口機制進行編碼和解碼;接著考慮在不對現有pdsn系統進行大改動的基礎上，設計了mppc壓縮模塊，並基於vxworks系統平臺實現了對數據報文內容壓縮的功能;最後對壓縮功能進行了測試並給出測試數據。
  11. Basded on the reference software - - jm61e of h. 264 and through a detailed analysis and capability test of the encoder, we find out the major parts that lead to the high computation

    本文以h . 264的參考代碼jm61e為實驗平臺，對其編碼器進行了詳細的分析和性能測試。
  12. Based on the test model long - term 8. 0 ( tml8. 0 ) of h. 26l and through a detailed analysis and capability test of the encoder, the present paper finds out the code that is worthy of optimizing and it also finds out the way to optimize the code and accelerate coding by using mmx technique

    本文以h . 26l的測試模型tml8 . 0為實驗平臺，對其編碼器進行了詳細的分析和性能測試，找出最值得優化的程序代碼，並在此基礎上採用mmx技術對其進行優化，加快編碼速度。
  13. Secondly it analyses the advanced technology of xvid and mainly introduces the optimized part of what we did - - the join of b - vop. thirdly the dissertation introduces topological framework of campus network, the technical advantage and the work of what we did on the network. lastly the dissertation introduces the selected platform of streaming media - - windows media technology, and it also introduces the making course of streaming media which is compressed with xvid, many experiences of streaming media system are given on the basic of system test

    論文首先介紹了流媒體及mpeg - 4方面的一些基礎知識；其次對xvid編解碼方法的先進技術進行了分析，並重點闡述圍繞該編解碼方法所進行的優化? ?加入b - vop支持；接著介紹了園區網的網路構成，並詳細說明了圍繞流媒體特點在園區網上所作的工作及取得的技術優勢；最後介紹了園區網所採用的流媒體技術發布平臺? ? windowsmediatechnology ，並給出了基於xvid編解碼的流媒體的加工流程，進而在對系統測試的基礎之上給出了許多流媒體系統的維護經驗。
  14. In 2004, rthk intends to commence tests on digital broadcasting in two phases

    2004年，香港電臺分兩個階段，再度測試數碼聲音廣播。
  15. Fortunately, ipsec provides us security services for ip layer and higher layers, such as access control, connectionless integrity, data origin authentication, rejection of replayed packets ( a form of partial sequence integrity ), confidentiality ( encryption ), limited traffic flow confidentiality, and so on. the thesis gives a type of network security architecture based on ipsec system, it includes the following contents : 1 analyzing the security problem in tcp / ip protocol stack, current main network attack methods and regular defense methods. 2 studing the overall architecture, main security protocols, application environments, and working mechanism of ipsec

    本文所提出的新一代網路安全體制就是建立在ipsec體系基礎上的，在本文的撰寫過程中，我主要進行了如下一些工作： 1深入分析了由tcp ip協議棧本身帶來的安全問題、當前主要的網路攻擊方法以及常採用的防範對策； 2研究了ipsec標準的總體結構、主要安全協議、應用場合以及其工作機制； 3研究了當前常用的各種數據加解密機制以及密碼演算法，深入分析了它們各自的特性和具體的使用方式； 4閱讀了大量關于混沌密碼的文獻資料，了解目前混沌密碼的研究動態和成果，研究混沌密碼體制的工作機理，然後利用vc + + 6 . 0作為開發平臺對一類混沌密碼體制進行了實現，並為它編寫測試代碼評估其性能。
  16. During the trial, programmes of am and fm stations will be relayed

    測試期間，數碼廣播系統將分別轉播現有的am臺及fm臺的節目，同時配合數據廣播。
  17. The study of this paper is based on the test model long - term 8. 0 ( tml8. 0 ) of h. 26l. in this thesis, detailed parallel analysis and parallel performance testing for the encoder are given, and parallel implementation is included with simulation results

    本文以h . 26l的測試模型tml8 . 0為實驗平臺，對其編碼器的并行資源進行了詳細的分析和性能測試，並在此基礎上實現了編碼的并行計算。
  18. On the one hand, we separate the system into four apartment, basic database, quoting for tenders, the document management and consumer information management, on the other hand, we are going on the logic design for the database in detail according to the requirment. we design the database ' s physical structure and distributing according to client end / server mode. we design the database equitment and the database with microsoft sql server

    在應用軟體開發上，按照客戶端服務器模式設計出數據庫的物理結構及分佈，在microsoftsqlserver上建立了數據庫設備及數據庫；在程序編碼上，採用面向對象和生命周期法相結合，開發出滿足功能設計的應用軟體，並在用戶的應用測試中不斷修改完善，同時給出相應的技術文檔；在開發平臺的選擇上，主要用powerbuilder作為前端開發工具。
  19. According to the function of test platform, the test platform is partition into a few modules. those modules are designed with verilog hdl and the key problems are discussed in details. the verilog codes for transmit and receive end of test platform are simulated under quartus ii 5. 0 ise, and debugged by downloading the verilog programs into ep1s25f780c and ep1s80b956c6 developing kits

    在對每一個模塊的設計要點做了詳細說明之後，採用verilog語言編寫各模塊邏輯代碼，在altera公司的quartusii5 . 0集成開發環境下，基於altera公司stratix系列fpga對各模塊及整個窄帶ldpc解碼-誤碼測試平臺進行了模擬並將發端和收端的verilog程序分別下載到altera的ep1s25f780c和ep1s80b956c6開發實驗板進行調試。
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