第一級選擇器 的英文怎麼說

中文拼音 [xuǎnzhái]
第一級選擇器 英文
first selector
  • : Ⅰ助詞(用在整數的數詞前 表示次序) auxiliary word for ordinal numbers Ⅱ名詞1 [書面語] (科第) gr...
  • : Ⅰ名詞1 (等級) level; rank; grade 2 (年級) any of the yearly divisions of a school course; gra...
  • : Ⅰ動詞1. (挑選) select; choose; pick 2. (選舉) elect Ⅱ名詞(挑選出來編在一起的作品) selections; anthology
  • : 擇動詞(挑選) select; pick; choose
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • 選擇 : select; choose; opt; election; choice; culling; alternative
  1. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    五章提出了基於ieee754浮點標準的浮點運算處理的設計和異步串列通信核的設浙江大學博士學位論文計,提出了適合硬體實現的浮點乘除法、加減運算的結構,浮點運算處理主要用於高速fft浮點處理功能,異步串列通信核主要用於pft處理ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分六章提出了面向系統晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計,在討論可測試性設計策略的問題上,提出了針對不同模塊進行的分別測試策略,提出了層次化jtag測試方法和掃描總線法,提出了基於fpga
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