系統單晶元 的英文怎麼說
中文拼音 [xìtǒngdānjīngyuán]
系統單晶元
英文
system on chi（soc）-
This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga
本課題主要針對星載并行計算機體系結構及軟體結構的特點，從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統級容錯模型研究，提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究，提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略，同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術，提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案，實現該方案所需增加的電路少，可避免板級晶元以及fpga晶元內部任何邏輯發生單點故障。Aimed at the flaw of weak anti - slide function in traditional engineering machine, the thesis puts forward a new auto - anti - slide differential gear system controlled by intel 8751 microcontroller, which adopts the fuzzy logic as its control algorism and the best slide ration ( s ) as system ' s control target
針對傳統工程機械差速系統存在防滑功能不強的缺陷，提出以intel8751單片機為控制晶元，以最佳滑移率s為控制目標，採用模糊邏輯控制為控制演算法的自動防滑差速系統。In this thesis, mainly by fmr, combined with moke and magnetic measurement, systematical studies have been made on the magnetic properties, especially magnetic anisotropy in epitaxial single crystalline fe ultathin films on gaas and inas substrates in polycrystalline thin films and in polycrystalline nife and nifeco patterned films of micron and submicron rectangular elements arrays
本論文以鐵磁共振為主要研究手段，輔助以磁性和磁光測量，對外延于gaas及inas上的不同厚度的單晶fe超薄膜、不同厚度的nife多晶薄膜和電子束光刻的多晶nife和nifeco單層利三明治結構的微米及亞微米矩形單元陣列圖形薄膜的磁性，特別是磁各向異性進行了較為系統的研究。Secondly, the central processing unit ( cpu ) of the tms320c2812 、 peripheral interrupts 、 analog - to - digital converter ( adc ) and event manager ( ev ) modual are reseached. a real - time data operation system based on dsp platform is designed. single and multi - channel real - time data acquisition experiment. is achieved
二、研究了tms320f2812dsp的cpu晶元結構、中斷系統、 ad模塊和ev模塊以及dsp集成開發環境ccs2 . 0 ，利用dec2812 ，設計並實現了實時數據採集系統，完成了單通道以及多通道的數據採集實驗。This paper introduces the progress of the cable modem technique and the international standard related to it, gives a project of cable modem firmware design based on docsis / eurodocsis 1. 1. as the project is based on the conexant superpipe single ic for cable modem that has a high integration and a programmable mac for docsis / eurodocsis 1. 1, it is easy for producer to customize his cable modem system on the conexant project and reduce the cost
本文介紹了cablemodem技術和相關國際標準的發展，並給出了一種符合docsis / eurodocsis1 . 1標準的cablemodem固件設計方案（此設計方案主要基於conexantsuperpipe單晶元cablemodem解決方案） 。 conexantsuperpipe晶元具有高度的集成性，可有效降低成本，而且該晶元具有符合docsis1 . 0 / 1 . 1的可編程的mac層，便於生產廠商在此方案基礎上進行二次開發定製自己的cablemodem系統。This paper systematically presents the whole design process of a cryptogrammic chip based on reconfigurable architecture. firstly it begins with a brief introduction to the background of the cryptogrammic chip design, and it clearly states the characteristic and the researching thoughts of cryptogrammic chip design with hdl. then the design environment and cipher algorithms are introduced briefly
本文系統地論述了基於可重組體系結構的密碼晶元設計的全過程，文章首先闡述了該設計的課題背景，給出了使用hdl方法設計密碼晶元的特點和研究思路，然後對晶元的設計環境作了簡要說明，並對密碼演算法進行了簡單介紹。The sa9904b, produced by sames company, is a three phase bi - directional energy / power chip and completes the measurement of rms voltage, rms current, powe, energy, power factor and frequency as the kernel of detecting unit
本系統採用sames公司的三相雙向電能功率晶元sa9904b作為測量單元的核心來完成電壓、電流、功率、電能、功率因數和頻率的測量。The leec biochip can be connected with pcb ( printed circuit board ), thus it can generate a moving electric field by changing time, scope and field intensity discretionarily under single chip processor ' s control. meanwhile it is probable to reduce driving voltage and decrease temperature greatly, and so increase resolution of dna separation
研究內容包括線性分散式電極陣列的理論設計，以普通載波片和有機高聚物pdms （ polydimethylsiloxane ）為基本材料的晶元製作工藝， leec晶元和pcb板的連接方式，硬體控制系統的設計以及控制晶元工作的單片機程序編制等，此外還包括電化學檢測方法的研究。This paper mainly focuses on the noise limiting by means of the direct sequence spread spectrum ( dsss ) and the analysis of the transmission performance of the plc and some digital modulation technology. the contents of the paper is as follows : 1 ) the technical feasibility is proved after simulating noise limiting principle of dsss by means of systemview, the simulation software ; 2 ) a kind of band pass filter ( bpf ) is realized according to the requirement of filter and the principle of butterworth approximation, which satisfies the index of performance of dsss. 3 ) the low voltage plc system includes the sc1128, the specific modulation / demodulation ic, the bpf filter and other circuit components, furthermore, the control function of system is realized by means of the personal computer and the microcontroller
本課題在對低壓電力線的傳輸特性和數字調制技術進行分析的基礎上，將通信理論中的直接序列擴頻技術（ dsss ）用於解決低壓電力線通信的干擾問題，主要研究內容如下： （ 1 ）用通信模擬軟體systemview對dsss技術的通信和抗干擾原理進行模擬分析，分別對時域和頻域下採用dsss技術前後接收信號的頻譜進行分析，驗證dsss技術在本系統中的可行性； （ 2 ）由dsss技術對濾波系統的要求，根據濾波理論分析了巴特沃思型濾波器的逼近原理並設計了合適的濾波電路； （ 3 ）用調制解調晶元sc1128和自行設計的濾波器加之輔助外圍電路，構造出低壓電力線載波通信系統，並採用atmel公司的單片機設計了接收和發射電路的微控制器； （ 4 ）分別對採取抗干擾措施前後輸入和輸出信號進行對比實驗，並對結果進行分析，驗證了dsss技術對干擾信號的抑制作用。According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system
針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。The conventional quadrants sensors mainly have 4 or 8 quadrants, which are not integrated with the signal processing circuits in one chip but are soldered with the discrete signal processing circuits. in this way, it ' s difficult to realize the micromation and system optimization of the devices. in addition, there are few number of photoelectric sensor parts in conventional quadrants sensors, which limits the targets information got from the conventional quadrants sensors
傳統的硅象限傳感器主要採用四象限，八象限的結構，採用焊接的方式將分別製造的感光象限和電路結合在一起，不能實現感光象限與信號處理電路的單晶元集成，難以實現器件的微型化和系統優化；同時，傳統象限傳感器的感光象限單元數量較少，獲取的目標信息有限，難以實現對目標的坐標位置獲取、形狀識別等功能。Status - register copy, single - chip systems
單晶元系統狀態緩存器復制Single chip system extension register
單晶元系統擴增緩存器System on chip so
系統單晶元Peripheral addressing, single chip systems
單晶元系統外圍尋址Parallel data transfers, single chip system
單晶元系統平行數據轉移Programming capabilities, single chip systems
單晶元系統規劃能力Program counter, single chip system
單晶元系統程序計數器Pointer registers, single - chip system
單晶元系統指針Microprogram, single - chip system
單晶元系統微程序分享友人