系統緩沖單元 的英文怎麼說
中文拼音 [xìtǒnghuǎnchōngdānyuán]
系統緩沖單元
英文
system buffer element-
In such systems, queuing technology provided the buffering and control mechanism needed to support orderly and properly sequenced transaction flows between individual processing elements
在這種系統中，排隊技術提供了為支持各個處理單元之間有序的交易流動而需要的緩沖和控制機制。The content of the electricity transforming of the system with profibus includes the designing of signal detecting and dealing system, the developing of the major cache unit machine control, the integration of the system diagnosis and data information, and the subordinate station diagnosis function
基於profibus現場總線技術的濾棒儲存輸送系統電氣改造設計內容，主要從系統信號檢測與處理方式的改進設計、主體緩沖單元電機控制方式的改進設計、系統診斷及生產過程數據信息的集成設計和系統從站診斷功能設計等幾個方面講解。Moreover, video control program to implement internal function of fpga is designed including video capture time sequence control, ping - pang frame buffer read and write time sequence control and lcd display time sequence control, and program ' s simulation and analysis is also provided. at last, this paper presents a portable iv ' s video processing system, and proposes three buffer strategy to control capture buffer. and a moving object detection algorithm of combing an adaptive background subtraction technique with a three - frame differencing is adopted
設計了基於fpga系統結構的車載視頻顯示電路板；利用單片機io口模擬i2c時序，實現了視頻解碼晶元控制；利用fpga實現視頻控制，研究了採集通道時序控制、雙幀存ram讀寫時序控制及lcd顯示時序控制的方法，並進行了軟體模擬和分析；設計了車載視頻檢測系統方案，給出了管理採集緩沖區的三幀緩沖策略，採用綜合三幀差分和自適應背景相減的演算法實現運動檢測，連通體檢測去除虛目標，模擬實驗證明其有效性，同時分析了該演算法在dsp視頻檢測系統中的簡單實現方法。With regard to the buffer storage of the module, a new method called two - lever buffer structure is adopted, in which the fpga ‘ s internal ram cells is the first level buffer and the sdram of embedded system is the second level buffer
2 .在設備的緩存方案上採用二級緩沖結構，利用fpga內部提供的存儲器單元作為第一級緩沖，利用嵌入式系統中的sdram作為第二級緩沖，實現了多通道、大規模緩存技術。分享友人