級聯電路 的英文怎麼說

中文拼音 [jíliándiànlù]
級聯電路 英文
cascade circuit
  • 級 : Ⅰ名詞1 （等級） level; rank; grade 2 （年級） any of the yearly divisions of a school course; gra...
  • 聯 : Ⅰ動詞（聯結; 聯合） unite; join Ⅱ名詞（對聯） antithetical couplet
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. A circuit topology of the inverter with duty cycle extended active clamp forward style high frequency pulse dc link is adopted by each independent inverter. each inverter is cascaded by a circuit with duty cycle extended active clamp forward style high frequency pulse dc link and a dc / ac inverting bridge. the control strategy of voltage mode pwm forwardback is adopted by the former, and the control strategy of three - state discrete pulse modulation ( dpm ) hystersis current is adopted by the later

    每個獨立的航空靜止變流器採用占空比擴展有源箝位正激式高頻脈沖直流環節電路拓撲，由占空比擴展有源箝位正激式高頻脈沖直流環節電路與dc ac逆變橋級聯而成，前級採用電壓型pwm前饋控制技術，后級採用三態dpm電流滯環控制技術。
  2. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。
  3. Thirdly, the relative theories of the limiter and rectifier are studied. in order to make the passive responder work stably under the conditions of large dynamic range of the receiving power and the high efficiency requirement, a two - stage limiter circuit and a voltage - doubler rectifier circuit with several diodes parallel are developed

    3 ，對應答器地面裝置中的能量轉換電路進行了研究，針對應答器地面裝置接收到的載波功率具有大動態范圍的特點以及系統能量轉換的高效率要求，設計了一種兩級級聯二極體限幅電路和多管並聯的倍壓整流電路。
  4. Feed network is an important part of short - wave multimode multi - feed antenna system. the design of feed network is a pivotal technique in the process of projecting antenna system. above all, this paper expounds the basic notion and procedure of analyzing and designing feed network applying the substructure analyzing theoretics of interconnect - net. basing on these jobs, some radical methods of analyzing and measuring the substructure of feed network are presented. using these methods, substructure is analyzed and measured. finally, a measured database of substructure of feed network is established

    本文首先闡述了應用網際網路絡子結構級聯理論分析、設計饋電網路的基本思路和步驟，在此基礎上，給出了饋電網路子結構分析和測量的基本方法，並且應用這些方法完成了饋電網路子結構的分析和測量，最後給出了饋電網路子結構的測量數據庫。
  5. A analysis of these effect to the pattern is presented. in the mean time, the method of correcting the phase errors is given by shortening or lengthening the section of sinuous feed line between couplers from the normal value. 6. the reflection characteristic of a serpentine is analyzed where the coupler is replaced by the equivalent of two ports loss network

    提出了用有耗二埠網路來等效波導耦合器的方法，對由耦合器、饋電波導和波導彎頭級聯的慢波線系統的駐波特性進行了分析計算，針對慢波線在設計測射頻率上大反射問題，討論了多種解決辦法。
  6. Become a kind of new electronics circuit - current - mode circuit. it is replacing the traditional design method of the voltage - mode in the high frequency high - speed signal processing realm 。 this thesis mainly discussed the modified second - generation current conveyors based on the current - mode kinds of new cuicuit components, they are stronger modified standard current - mode parts in fuctions on this foundation. mainly including the modified differential difference current conveyor ( mddccii ) 、 the fully balanced second generation current conveyor ( fbccii ) 、 ( full balances ) four - terminal floating nullor ( fbftfn ) and the current differencing buffered amplifier ( cdba ), they are all function very strong standard current - mode parts, they all can provide some circuit functions of better than general operation amplifier, because they have the voltage importation and the current importation, therefore use it since can carry out the voltage - mode signal processing circuit expediently, can also carry out the current - mode signal processing circuit expediently, and have to increase the benefit bandwidth to accumulate more widely than the voltage - mode, but have their advantages more according to the current - mode filter of the modified current conveyor, because it constitutes in brief, the filter wave function is stronger and they are better than in general use operation amplifier of many advantages, be easy to composing for example 、 high speed 、 frequency bandwidth 、 the power supply voltage requests low 、 consume small, the impedance is different from etc. advantages, otherwise they have biggish dynamic range, and flexible circuit synthesize, so they are the best active parts

    從第二代電流傳輸器ccii入手，重點研究了以下幾種改進型的第二代電流傳輸器:改進的差動差分電流傳輸器mddccii 、全平衡第二代電流傳輸器fbccii 、多輸出四端浮地零器ftfn 、全平衡四端浮地零器fbftfn 、電流差分緩沖放大器cdba的電路結構及其模型。然後在此基礎上系統地研究了基於這幾種改進型的第二代電流傳輸器的濾波器的設計方法，主要方法和結果如下:利用mddccii設計了差分式連續時間電流模式低通、帶通濾波器;電流模式跳耦結構考爾低通濾波器;利用fbccii設計了帶通二階節濾波器及電流模式雙二階通用濾波器;設計了基於多輸出端ftfn的電流模式二階通用濾波器電路;通過數字化開關選擇的基於fbftfn的電流模式通用濾波器;設計了基於最少個數電流緩沖放大器（兩個cdba ）的多功能通用電流模式濾波器及其在非理想因素情況下分析。設計濾波器的主要方法是採用級聯設計、運算模擬（信號流圖法）和反饋設計（跳耦法） 。
  7. Telegraph equations, can be looked as cascade connection of two - port network of lumped circuit of transmission line, is a hyperbolic partial differential equations

    傳輸線可以看作集中參數二埠網路的級聯，其數學模型?電報方程是一階雙曲型偏微分方程組。
  8. The chip is accomplished in the full cooperation with other team members, the author pays particular attention to the analysis of the whole chip architecture and three sub - block design : transconductance amplifier ( ota ), voltage reference and current reference. based on existed technologies, a new high order temperature compensated voltage reference and a creative current reference with high order temperature compensation are shown respectively. the author simulated all the sub - block and whole chip by hspice

    該晶元的設計是由小組成員共同完成，本人主要負責了總體電路的分析、聯合模擬驗證及以下三個子電路的設計: 1 、跨導放大器，詳細分析了bandgap跨導放大器輸入級的動靜態特性及其優缺點，並結合系統要求，設計了一種與cmos工藝相兼容、可替代bandgap跨導放大器的低壓共源共柵跨導放大器。
  9. In the design, the diode of agilent ' s hsch - 9161 is used. with the diode circuits in parallel, the millimeter - wave short pulse detector has been designed. it works at the frequency of 37 to 38ghz, and the pulse duration is 400ps

    本文採用agilent公司的hsch - 9161檢波二級管，選取二極體並聯檢波電路形式，完成了工作頻率為37 ~ 38ghz 、脈沖寬度為400ps的毫米波短脈沖檢波器的研製，同時設計了一個毫米波短脈沖調制器。
  10. Deduction shows that a series inductor can be applied as the inter - stage matching network between the two stages

    圍繞級間匹配網路的實現這一核心問題，推導出級間匹配電路可以用一個串聯電感實現。
  11. For the system application, we cascade multi - module to satisfy the system ’ s demands. the measured results of fabricated limiting amplifier are in agreement with eda simulation results. the experimental results indicate that the x - band limiting amplifier can satisfy performance demands of x band receiver

    本課題採用了模塊化的設計方法，首先設計限幅放大器模塊電路，經製作、調試，得到能滿足級聯要求的、性能穩定的模塊電路;然後根據限幅放大器整體系統指標的要求，多級模塊級聯組成限幅放大器整體電路。
  12. Loading different shapes of slots in the patches of antennas will cut off the original surface current and the current has to flow around the slots that make its route longer. this course is equally satisfactory in result of inserting cascade inductances in the equivalent circuit of antenna

    當在貼片表面開不同形式的槽或細縫時，切斷了原來的表面電流路徑，使電流繞槽邊曲折流過而路徑變長，在天線等效電路中相當于引入了級聯電感。
  13. This paper introduces the electricity market status in and out of the country and the power industry in fujian province. it investigates how to set up fujian province electricity market. it provides a layered network model about the mainstream and branch cascaded hydro plants and the generation plan in one day considering the assistant serving. it also provides some software to resolve the problem about the hydro - thermal coordination. and provides some solutions in a certain exetent

    針對福建省水電豐富、梯級水電站較多的具體情況，採用網路流法構建了一個完整的解決閩江各支流、幹流復雜梯級電站經濟調度的模型，建立了計及輔助服務的發電市場日交易計劃的模型，開發了解決水火電聯合經濟調度及相關的報價體系的初級軟體，並進行了初步試算和分析。
  14. The phase shifter circuit consists of five digital bits corresponding to differential phase shifts of 180, 90, 45, 22. 5 and 11. 25 cascaded in a linear arrangement. the three lower phase shift circuits are of loaded - line type, in which the 11. 25 phase shift bit use a single loaded - line configuration. the 90 and 180 phase shift bits are of reflection type, using lange coupler to realize the separation between the incident and reflection signals

    移相器電路由五位移相電路級聯而成， 11 . 25 、 22 . 5和45移相電路為加載線型，其中11 . 25採用了單加載線形式； 90和180為反射型移相電路，使用蘭格耦合器實現輸入、輸出信號的隔離。
  15. Source host proceeds as alice, and multiple hosts proceed as bob. each host contributes the part of encrypted circuit representing its function, and thus the resulting encrypted circuit is a cascade of sub - circuits

    以源主機充當alice ，多個主機充當bob ，所有主機貢獻出加密電路當中代表自己函數的部分，各個子電路進行級聯，從而構造出最終的加密電路。
  16. In this paper, the capacitance and inductor of cmos technology are briefly introduced firstly, and the noises of two - port network and cascade system are analyzed, the correlative formulas are shown at the same time

    文中首先對cmos工藝中的電感電容進行了簡單介紹，對二埠網路噪聲和級聯系統的噪聲進行了分析並給出了計算公式。
  17. The author firstly analyzed the mathematic model of the cascaded brushless doubly - fed machine ( cbdfm ) on the dq and mt coordinate rotating at rotor speed and synchronous speed seperatly, and the equivalent circuit of steady state. the author also analyzed the stator power winding flux oriented vector control strategy of the cbdfm as vscf wind power generator and validated the validity of the model and strategy by the simulation analysis

    此外，本文還首次詳盡地分析了級聯式無刷雙饋電機在轉子機械速dq坐標系、定子同步速mt坐標系下的數學模型，穩態等效電路及作變速恆頻風力發電機運行時的定子功率繞組磁鏈定向矢量控制策略，通過模擬分析驗證了模型和策略的正確性。
  18. In the process of design, the thesis using the circuit structure of inverter series within memory cell, and sharing read and write ports within multi - bit for the first time, solves dominoes effect for driving multi - read port problem, and reduces layout area of double - memory cell for about 40 %, respectively

    在設計過程中，首次對位單元採用反相器級聯的電路結構，解決了由於驅動多讀出埠問題引起的電路驅動多米諾效應;首次採用了多位共享讀寫埠的電路結構，減小了雙存儲體40 %的版圖面積。
  19. A new type 270v input / single phase 115v output aviation static inverter ( asi ) is researched in this paper. adapting a modularized scheme, the asi is constructed by four isolated dc - dc converters and a cascade inverter

    本文研究270v輸入/單相115v輸出航空靜止變流器，採用一種模板化的方案，靜止變流器由多路隔離直流電源和級聯逆變器構成，本文重點研究其中的直流變換環節。
  20. We decide to use seven - sections coupled - line filter after comparing the various filter circuits, and complete the quantitative analysis and optimization design by ads, hfss etc. ( 2 ) three - stages fet low noise amplifier according to the lna ’ s design theory and guide line, we decide to use ne3210s01 fet and choose the form of three - stages, thus we can achieve high stability, low noise and high gain

    通過對各種帶通濾波器電路方案進行比較，確定採用七階平行耦合微帶濾波器，並利用ads ， hfss等工具進行了定量的理論分析和優化設計。 （二）三級聯低噪聲放大器根據微波lna設計原理及指標要求，我們選用ne3210s01系列低噪聲管，並採用三級放大的形式，以期獲得高穩定性，低噪聲，高增益。
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