線性延時電路 的英文怎麼說

中文拼音 [xiànxìngyánshídiànlù]
線性延時電路 英文
linear time delay circuit
  • 線 : 名詞1 （用絲、棉、金屬等製成的細長的東西） thread; string; wire 2 [數學] （一個點任意移動所構成的...
  • 性 : Ⅰ名詞1 （性格） nature; character; disposition 2 （性能; 性質） property; quality 3 （性別） sex ...
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 線性 : [數學] [物理學] linear; linearity線性代數 linear algebra; 線性方程 linear equation; 線性規劃 line...
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. Abstract : a new clock - driven eco placement algorithm is presented for standard - cell layout design based on the table - lookup delay model. it considers useful clock skew information in the placement stage. it also modifies the positions of cells locally to make better preparation for the clock routing. experimental results show that with little influence to other circuit performance, the algorithm can improve permissible skew range distribution evidently

    文摘:提出了一種新的時鐘性能驅動的增量式布局演算法，它針對目前工業界較為流行的標準單元布局，應用查找表模型來計算延遲.由於在布局階段較早地考慮到時鐘信息，可以通過調整單元位置，更有利於后續的有用偏差時鐘布線和偏差優化問題.來自於工業界的測試用例結果表明，該演算法可以有效地改善合理偏差范圍的分佈，而對電路的其它性能影響很小
  2. When switching the no - load overhead lines by alternating - current high - voltage circuit breaker which is a kind of daily operations in electric power system, over - voltage is probably bringed out and insulating property of the electric devices is breakdowned sometimes, especially, when occuring re - strike. the main purposes that the tests on switching line - charging current are performed in the laboratory are assessing re - strike performance of circuit - breakers. according to the test results, the design of the circuit - breaker is optimized and re - strike performance is improved

    交流高壓斷路器是電力系統中最關鍵最重要的設備之一，斷路器開合空載架空線路是電力系統中常見的操作，操作過程中通常會出現過電壓，對系統絕緣造成威脅，嚴重時會破壞系統的絕緣性能，發生事故，隨著電力系統電壓等級的提高、輸電線路不斷延長及傳輸容量的增大，由操作過電壓引起的絕緣閃絡、設備破壞事故的幾率更加突出。
  3. As the technology advances into deep sub - micron era, crosstalk reduction is of paramount importance for signal integrity. simultaneous shield insertion and net ordering sino has been shown to be effective to reduce both capacitive and inductive couplings

    隨著集成電路工藝發展到深亞微米技術，互連線串擾問題變得相當重要，它與互連線時延問題成為了決定電路性能的主要因素。
  4. In high voltage power transmission line, in order to ensure power system juxtaposition operation ' stability and bump feeding power up against, at a great many instance, without delay from line ' s terminal excision by the protected line interior fault

    在高壓輸電線路上，為了保證電力系統並列運行的穩定性和提高輸送功率，在很多情況下都要求無延時地從線路兩端切除被保護線路內部的故障。
  5. An algorithm of path - based timing optimization by buffer insertion is presented. the algorithm adopts a high order model to estimate interconnect delay and a nonlinear delay model based on look - up table for gate delay estimation. and heuristic method of buffer insertion is presented to reduce delay. the algorithm is tested by industral circuit case. experimental results show that the algorithm can optimize the timing of circuit efficiently and the timing constraint is satisfied

    提出了一種基於路徑的緩沖器插入時延優化演算法，演算法採用高階模型估計連線時延，用基於查表的非線性時延模型估計門延遲.在基於路徑的時延分析基礎上，提出了緩沖器插入的時延優化啟發式演算法.工業測試實例實驗表明，該演算法能夠有效地優化電路時延，滿足時延約束
  6. Telecommunications - network and customer installation interfaces - analog voicegrade switched access lines with the call waiting, distinctive call waiting, or calling identity delivery on call waiting feature

    電信.網路和用戶裝置間的介面.帶呼叫延時區別性呼叫延時或呼叫延時中呼叫身份傳送功能的模擬音頻轉換訪問線路
  7. The input voltage of the piezoresistive transducer, gain, sampling frequency and negative delay can respectively be graded through programming. the stored system is specially designed to have two modes of trigger ( namely, external trigger through wire breakage and inner trigger through overpressure signal ), reading software and interface circuit that are of

    該測試系統可通過編程選擇傳感器供電電壓（兩檔） 、放大倍數（四種） 、采樣頻率（四種） 、負延遲（四種） ；同時具有斷線外觸發和超壓信號內觸發兩種觸發方式；讀數的軟體和介面電路都具有串併兼容特性；系統還具有狀態自檢和定時上電等功能。
  8. In the fifth chapter, a new fully differential operational amplifier with voltage and current - mode negative feedback has been proposed, which can stabilize its quiescent operation point, using the characteristic of mos transistors which operate in the triode region acting as active variable resistor, a fully differential fourth - order chebyshev low - pass filter with tunable frequency and bessel low - pass filter with accurate group delay based on r - mosfet - c and operational amplifier has been designed

    第五章：提出了一種新的既具有電壓共模負反饋又同時具有電流共模負反饋的全差分運算放大器電路，能較好地穩定電路的靜態工作點，並應用mos管工作在線性區可作有源可變電阻用的特性設計得到了截止頻率可連續調節的高性能r - mosfet - c 、運放結構切比雪夫（ chebyshev ）和精確群時延值貝塞爾（ bessel ）低通濾波器。
  9. And to the electric capacity type voltage mutual inductor, because it compares with electromagnetic type voltage mutual inductor, transient state its bad to respond characteristic, as circuit when making the short circuit two times trouble, the voltage two times delays dropping to zero while needing to pass certain one

    而對于電容式電壓互感器，由於它與電磁式電壓互感器相比，其瞬態響應特性比較差，當線路故障而使二次短路時，二次電壓需經過一定的時延後才能下降到零。
  10. Function : power input : standard 220vac, 50hz ; power output : no load 12. 4 - 13. 63vdc, with load dc12v 13v standard current output : 10a moment current output : 10a control electric locks or bolts directly, reduce the load of access controller save project lines lower potential trouble have output nc no, control all kinds of electric locks has delay control circuit, unlock delay in 0 - 10s use exit button, press to 0pen the electric lock directly auto self - protection function : when short circle and other unexpected situation happen, the power supply can melt the fuse to protect itself

    功能特性：交流輸入：標準ac220v 50hz直流輸出：空載輸出dc12 . 4v 13 . 63v負載輸出dc12v 13v標準輸出電流10a瞬間輸出電流10a直接控制電鎖：可減小門禁控制器的負荷，節省工程布線，減少故障隱患。設nc no輸出，可控制各種類型的電鎖。設延時控制電路，開鎖時間可在0 10秒。
  11. Function : power input : standard 220vac, 50hz ; power output : no load 12. 4 - 13. 63vdc, with load dc12v 13v standard current output : 2. 5a moment current output : 2. 5a control electric locks or bolts directly, reduce the load of access controller save project lines lower potential trouble have output nc no, control all kinds of electric locks has delay control circuit, unlock delay in 0 - 10s use exit button, press to 0pen the electric lock directly auto self - protection function : when short circle and other unexpected situation happen, the power supply can melt the fuse to protect itself

    功能特性：交流輸入：標準ac220v 50hz直流輸出：空載輸出dc12 . 4v 13 . 63v負載輸出dc12v 13v標準輸出電流2 . 5a瞬間輸出電流2 . 5a直接控制電鎖：可減小門禁控制器的負荷，節省工程布線，減少故障隱患。設nc no輸出，可控制各種類型的電鎖。設延時控制電路，開鎖時間可在0 10秒。
  12. Function : power input : standard 220vac, 50hz ; power output : no load 12. 4 - 13. 63vdc, with load dc12v 13v standard current output : 5a moment current output : 5a control electric locks or bolts directly, reduce the load of access controller save project lines lower potential trouble have output nc no, control all kinds of electric locks has delay control circuit, unlock delay in 0 - 10s use exit button, press to 0pen the electric lock directly auto self - protection function : when short circle and other unexpected situation happen, the power supply can melt the fuse to protect itself

    功能特性：交流輸入：標準ac220v 50hz直流輸出：空載輸出dc12 . 4v 13 . 63v負載輸出dc12v 13v標準輸出電流5a瞬間輸出電流5a直接控制電鎖：可減小門禁控制器的負荷，節省工程布線，減少故障隱患。設nc no輸出，可控制各種類型的電鎖。設延時控制電路，開鎖時間可在0 10秒。
  13. Then test the time delay bandwidth and probability of error - code of power line carrier conmmunication network by plca - 22 protocol analyse apparatus to testify the validity of the system. at last i compare the results tested by the performance test virtual system and plca - 22 apparatus respectively, and analysis the virtue and shortage of the performance test virtual system, then bring forward the means to improve

    然後使用plca - 22協議分析儀對此電力線載波網路的延時、帶寬、誤碼率進行測試，以驗證本電力線載波通信性能虛擬測試儀設計的正確性。最後對比電力線載波通信網路性能虛擬測試儀和plca - 22測試出的結果，分析電力線載波通信網路性能虛擬測試儀的優點和不足，提出了改進的方法。
  14. First the dissertation analyzes and compares the actuality of the performance of the power line carrier network, then put forward the principle of the test system, configuration of the hardware and design of the software of the system. so i analyze the theory of the test system by testing the time delay, and analyze the factor which effect the time delay. then narrate how to test the bandwidth and probability of error - code briefly

    論文首先對電力線載波網路性能研究的現狀進行了分析和比較，然後提出本虛擬測試儀的實現原理，硬體的配製以及軟體的設計，接著通過詳細的延時測試說明此虛擬測試儀的運作原理，並分析影響延時的因素。還簡要地說明如何使用此虛擬測試儀對網路帶寬和誤碼率進行測試。
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