緩沖中間轉換 的英文怎麼說

中文拼音 [huǎnchōngzhōngjiānzhuǎnhuàn]
緩沖中間轉換 英文
buffering
  • 緩 : Ⅰ形容詞1 （遲; 慢） slow; unhurried 2 （緩和; 不緊張） not tense; relaxed Ⅱ動詞1 （延緩; 推遲） d...
  • 間 : 間Ⅰ名詞1 （中間） between; among 2 （一定的空間或時間里） with a definite time or space 3 （一間...
  • 轉 : 轉構詞成分。
  • 換 : 動詞1. （給人東西同時從他那裡取得別的東西） exchange; barter; trade 2. （變換; 更換） change 3. （兌換） exchange; cash
  • 轉換 : change; transform; convert; switch
  1. We could create faster and more maintainable code if we could call the latex and image conversion utility functions directly from java programs and use java in - memory buffers to exchange interprocess data

    如果我們可以直接從java程序調用latex和圖像轉換實用程序功能，並使用java內存中的緩沖區來交換進程間的數據，則創建的代碼可以更快且可維護性更高。
  2. Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function

    本文在簡單的論述了pc並口協議（ epp ）與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上，給出了基於dsp的arinc429通訊介面的設計方案:對通訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊板介面模塊的硬體結構設計，其中，對數據緩沖電路、數據傳輸速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖，包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後，給出了測試結果，對研製工作做了總結，對本設計的優缺點各做了評述。
  3. In the dissertation ， we discribe the implementation of large capability video data acquisition system based on pci bus of computer 。 the system is composed of data acquisiton card and corresponding software 。 the data acquisiton card include two acquisition channels ， 8 - bit digitization at rates up to 13. 5mhz 。 frist ， the architecture of the video data acqusition system is studied 。 then ， the function and implementation methode of each module are introduced in detail 。 the control module of the video data acqusition card is implemented by using of the isp technology of cpld and vhdl programming technology 。 the a / d converter used assembler to implement the initialazation programe 。 and the double buffer technology is used for large capability data acqusition. because a contiously large memory is difficult to apply in windows operating system 。 finally we use broland c + + to introduced the devleoping procedure of drivers 。

    在實際的研製過程中，利用cpld的在系統可編程（ isp ）技術和基於vhdl語言的可編程邏輯器件設計技術實現了視頻數據採集卡的控制模塊。在視頻的a / d轉換模塊，用匯編程序模擬i2c總線對初始化a / d轉換晶元。針對大容量數據採集，採用了雙緩沖技術解決wndows操作系統下難以申請到大容童連續內存的間題。
  4. So two buffers of different size are setup to convert the outside data to meet the request of dsp, and through this method, the compressing ratio is increased. ( 2 ) deal with the end sign of the datum

    在程序中設置了兩個存儲空間大小不一樣的緩沖區，通過外圍數據的轉換，來滿足程序中8bit的比較要求，從而大大提高了壓縮率（ 2 ）數據流結束標志的處理。
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