計數器寄存器 的英文怎麼說

中文拼音 [jìshǔqìjìcúnqì]
計數器寄存器 英文
register
  • 計 : Ⅰ動詞1 （計算） count; compute; calculate; number 2 （設想; 打算） plan; plot Ⅱ名詞1 （測量或計算...
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 計數 : count; tally; counting計數卡 numbered card
  1. Chapter two detailedly presents the design of the boundary scan testing system which is in accordance with ieee. 1149. correspondingly two special - used data registers are added, one of which is the scanning chain register and the other is the child scanning chain control - register

    文中第二章按照ieee . 1149標準詳細設計了邊緣掃描測試系統，相應增加了兩個專用數據寄存器，其中一個為掃描鏈寄存器，一個為掃描子鏈控制寄存器。
  2. The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl

    該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。
  3. Branch instructions using the contents of the link register or count register to specify the branch target address

    使用鏈接寄存器或計數寄存器來指定轉移目標地址的轉移指令。
  4. The third, the whole circuit of digital cmos image sensor is presented. the circuits of pixel array, clock signal generator and sam have been improved on the base of simulation

    再次，我們對整個cmos數字圖像傳感器進行了電路設計，主要包括：時鐘信號發生器，順序移位寄存器和像素陣列。
  5. The part of execution in which an operand or instruction is read from main stora ge and written into a control unit or arithmetic unit register

    執行過程中的一個階段所需的時間，在此期間，計算機從主存儲器中取出指令或操作數，並將其存入控制器或運算器的寄存器中。
  6. This program memory addressing logic is handled by a register referred to as a program counter.

    程序存儲器的導址邏輯是由寄存器來實現的，這個寄存器叫程序計數器。
  7. Chapter five discusses the design and the process of the generation of the control function, including counter, accumulator, comparator, shift register, demultiplexer, collector, access record. chapter six gives some advice and opinions on how to improve this computer software

    其次介紹了計數器、累加器、比較器、多路輸出選擇、移位寄存器控制項；數據類中的收集器、訪問記錄/部分輸出記錄等控制項的功能介紹和編程思路以及使用實例第六章對平臺的完善和改進闡述了一些個人的建議和想法。
  8. And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths. boundary scan is designed according to ieee1149. 1, and some other instructions such as degug, runbist are provided to support internal fault testing, online debugging and built - in self - test besides the several necessary insructions. internal scan is implemented by partial scan, through this the boundary of logic component and user - cared system registers can be selected to be scanned

    Bist用於測試cpu的微碼rom ，其它ram則利用微碼rom中的微程序進行測試，而微程序的運行則可以順帶覆蓋其它數據通路，從而使高達70 %的硬體得到測試;邊界掃描按ieee1149 . 1標準設計，除必備的幾條邊界掃描指令外，還提供了debug 、 runbist等指令以支持內部故障測試、在線調試及內建自測試;內部掃描採用部分掃描策略，選擇邏輯部件的邊界及用戶關心的系統寄存器進行掃描，從而實現了硬體邏輯劃分，方便了后續的測試碼產生和故障模擬，並為在線調試打下了基礎。
  9. The model, in this case, is the high - level language program - which, like all useful models, hides irrelevant detail about the idiosyncrasies of the underlying computing technology such as internal word size, the numbers of accumulators and index registers, the type of alu, and so on

    這種情況下，模式就是這個高級語言程序，它就像所有有用的模式那樣，隱藏了潛在的計算技術特性上的相關細節（比如內存字元大小，累加器的個數，索引寄存器， alu算術邏輯單元類型等等） 。
  10. If the chip remains sending state, it will take the data spread spectrum and modu - late, then sent forth by ad9768. the chip can be controlled throug h writing data in the interior 87 registers. secondly, this paper designed control system of twice civil air defense alarm system. because the scm " s port number was limited and port driving power is feebleness, this design realizes nixie tube ' s display drive with keyboard management chip max7219 and realizes true time display with ds1302, which can economize scm i / o port and make circuit connection simplicity

    通過對其內部87個寄存器寫入數據可對其進行控制。其次，本文對二次人防警報系統控制系統進行設計，針對單片機埠數目有限、埠驅動能力較弱等問題，使用鍵盤管理晶元max7219實現數碼管顯示驅動，用ds1302實現真時鐘顯示，節省了單片機i / o口，電路連接簡單。
  11. These include functions for memory management, exception vector processing, privileged register access, and privileged timer access

    其中包括用於內存管理、異常向量處理、特權寄存器訪問、特權計時器訪問的函數。
  12. In the data path, many modules were designed and implemented, such as alu. data bus unit, w ( work register ) and registers file. the designs of peripheral functional modules were finished, including usart, spi and io

    在詳細分析riscmcu的體系結構特點的前提下，進行了系統劃分，並詳細設計了該riscmcu的數據通路，包括設計該數據通路上的alu單元、內部數據總線、工作寄存器w以及寄存器文件等功能模塊。
  13. In the first part, this paper discusses the key problems in designing architecture of each component, which include why we choose partitioned regiater files, use 2 - way connected data cache with write - back strategy and add scratch - pad sram to original momory system, and how to identify their parameters. following that, a memory configuration based on the discussion above is presented

    本文首先介紹了dpc各個存儲器的設計和實現，詳細討論了寄存器文件分體結構的選擇並提出了寄存器文件參數配置的四條規律，介紹了數據cache容量及策略的權衡與選擇，闡述了scratch - padsram與cache並存的優勢。
  14. With software and hardware co - design method, this paper proposes an algorithm to calculate register lifetime in programs, and the control of writing results back into rf is implemented through an enable control signal provided by instruction encoding at compile time

    基於軟硬體協同設計的思想，在研究局部變量生存期演算法的基礎上，本文提出了通過編譯器指令編碼實現對硬體結構的使能控制，即控制流水輸出結果是否寫回寄存器文件，以減少對寄存器文件的寫次數，從而降低寄存器文件埠的讀寫壓力。
  15. This paper presents an architecture based - on shift register array, which can be used for the search for the two search pattern simultaneously. this architecture was inspired by the vlsi architecture for diamond - search - pattern - based algorithms. it exploits the overlap of reference data among the search points to reduce data memory accesses which are the most power consuming operations

    其基本思想是利用搜索點之間的參考數據重疊的特徵，把需要用於多個搜索點計算的參考數據存儲在移位寄存器陣列中，通過移位操作來滿足不同搜索點的計算需要，大大降低了數據存儲器訪問次數，從而減少了運動估計中功率消耗最大部分的操作。
  16. This register contains a loop counter that is decremented on certain branch operations

    這個寄存器中存放了一個循環計數器，會隨特定轉移操作而遞減。
  17. Det shift counter designed with the det shift register is demonstrated

    使用該移位寄存器設計雙邊沿移位計數器的實例被演示。
  18. A det shift counter designed with the det shift register is demonstrated

    使用該移位寄存器設計雙邊沿移位計數器的實例被演示。
  19. A det ( double - edge - triggered ) shift counter designed with the det shift register is demonstrated

    使用該移位寄存器設計雙邊沿移位計數器的實例被演示。
  20. The integrated register based vxibus interface is designed by using the advanced cpld technology. this method simplifies the interface circuit design and improves its reliability. 2

    利用cpld技術自行設計了vxi總線寄存器基集成化介面電路和數據採集控制電路，從而簡化了電路的設計，提高了可靠性。
分享友人
分享到 Line

分享到臉書