設計輸入 的英文怎麼說

中文拼音 [shèshū]
設計輸入 英文
design capture
  • : Ⅰ動詞1 (設立; 布置) set up; establish; found 2 (籌劃) work out : 設計陷害 plot a frame up; fr...
  • : Ⅰ動詞1 (計算) count; compute; calculate; number 2 (設想; 打算) plan; plot Ⅱ名詞1 (測量或計算...
  • : Ⅰ動詞1 (運輸; 運送) transport; convey 2 [書面語] (捐獻) contribute money; donate 3 (失敗) l...
  • : Ⅰ動詞1 (進來或進去) enter 2 (參加) join; be admitted into; become a member of 3 (合乎) conf...
  • 設計 : devise; project; plan; design; excogitation; layout; layout work; styling
  • 輸入 : 1 (從外部送到內部) import 2 [電學] input; entry; entering; in fan; fan in; 輸入變壓器 input tra...
  1. The realization of quick acquest under very low snr and big frequency shift is one of the key problems of lpi radar. we designed a new receiver which needs less computation spend without any decline of the performance of the radar

    如何在較低信噪比和較大頻偏的條件下實現擴頻碼快速捕獲是碼同步的難點,本文在不損失系統性能的基礎上,了一種結構簡單的接收機實現方案。
  2. This paper discusses the designing and making of the dynamic testing systems of engine electronic control system. base on the construction and operation principle of santana 2000gsi m3. 8. 2 engine electronic control systems, design and manufacture led circuit of dynamic testing and fault imitating electronic control unit. on the inspect board, design and equip with motronic 3. 8. 2 ecu i / o measuring joints, design and set up obd - ii diagnostic communication link, design and install fuel pressure inspecting meter. depend on the obd - ii diagnostic communication link and ecu i / o measuring joints, this dynamic testing system can inspect engine electronic fuel injection system, distributorless ignition system, idle speed control system and evaporative emission control system, and can inspect m3. 8. 2 sensors, ecu and actuators, and can interrogate fault memory and erase fault memory ; and can analyse data stream ; and can carry out fault imitating. besides, this paper analyses sensors and actuators typical fault w aves

    2電控單元電路連接器製成出電子控制檢測端子,並在檢測面板上布置了obd -診斷插座和燃油壓力表。使該動態測試系統能實現對電噴發動機的燃油系統、直接點火系統、怠速控制系統和燃油蒸氣排放控制系統的動態檢測;並通過obd -診斷座、 ecu出檢測端子和故障模擬處理單元實現對電噴發動機電控系統各傳感器、電控單元、執行器進行故障碼讀取與清除;動態數據讀取和波形測試和故障模擬等。此外,本論文還分析了傳感器和執行器典型故障波形。
  3. Piezoelectric - stack can give more output displacement and pressure and have more rate of conversion and more stability than bimorph type. it has been used to all kinds of driving places. design of displacement amplification we design displacement amplification because of the little displacement output of the piezo - stack. this paper analyses the disadvantage and advantage of all sorts of amplification, and proposes a new type of displacement amplification based on

    鑒于壓電疊堆出位移小的特點,引柔性鉸鏈位移放大機構,分析了各種放大機構的優缺點並結合實際問題,出基於三角形放大原理的橢圓形放大機構,利用有限元分析軟體ansys對放大機構的主要結構參數進行了分析,得出影響放大機構放大倍數的規律。
  4. Cere computer entry and readout equipment

    算機與讀出
  5. Contrapose to the instability of the third - order charge - pump pll system, the loop optimization method is employed in system level design to decide the bandwidth and phase margin, therefore the loop bandwidth locates at the maximum phase margin to guarantee the stability of the system. according to tsmc 0. 35 m sige bicmos model, the sub - circuits in the designed pll and the whole system are simulated and verified by the cadence spectre

    5 .根據tsmc0 . 35 msigebicmos工藝模型,利用cadencespectre模擬軟體對所的電荷泵鎖相環路中各個模塊及整個系統進行了模擬模擬,模擬結果顯示,在1 . 5v電源電壓下,頻率為200mhz的參考信號,出中心頻率為800mhz ,分頻電路採用4分頻,環路帶寬為10mhz ,捕獲時間大約為0 . 92 s ,功耗大約為15mw ,達到了指標。
  6. To research in the area of liquid helium cryopump used in nbi system is meaningful for obtaining better beam transportation efficiency. physical parameters and experience are obtained that are very useful in developing cryopumps

    開展中性束注系統液氦低溫冷凝泵的研究,對獲得優良的束傳效率,具有非常重大的意義;並為以後相關應用領域中低溫冷凝泵的提供了性能參數和工程經驗。
  7. A conventional edg design is based on the rowland circle on which the end points of the input and output waveguides located

    原有edg採用rowland圓出在圓弧曲線上由條形波導引出。
  8. The design of this chip sticks to the general methodology of hdl design. lt is entered in hdl format with innoveda ' s visual hdl and simulated with modelsim simulator, after synthesized with fpga compiler ii, the edif is entered in quartus ii, which is supplied by altera corporation to place and route. the sdo file produced by quartus ii is backannotated to the netlists and timing - simulation is been done. the success of this cryptogrammic chip also shows the effectiveness and advantage of the methodology of high level design with hdl

    在innoveda的visualhdl平臺上用hdl語言完成了設計輸入,使用modelsim模擬器完成了功能模擬,使用synopsys的fpgacompiler進行了基於alterafpga庫的網表綜合,最後將edif網表altera的布局布線工具quartus中進行了布局布線,將生成的sdo文件反標到modelsim模擬器中進行了時序模擬,該的成功,再一次表明了hdl方法的正確性和有效性。
  9. For a general linear model ( input matrix is deterministic ), under a certain conditions on variance matrix invertibility, the two estimates can be identical provided that they have the same priori information on the parameter under estimation. even if the above information is unknown only for the optimally weighted ls estimate, the sufficient condition and necessary condition, under which the two estimates are identical, is derived. more significantly, we know how to design input of the linear system to make the performance of the optimally weighted ls estimation identical to that of the linear minimum variance estimation in case of being lack of prior information

    在一般線性模型(即矩陣為確定性)下,當兩種估都利用有關被估參數的先驗信息時,二者在方差陣可逆的一定條件下可達到一致;當最優加權最小二乘估不利用此先驗信息時,存在二者一致的充分條件和必要條件,進而找到一種設計輸入矩陣的方法,使得在先驗信息缺乏的條件下,仍可利用最優加權最小二乘估達到與線性最小方差估一樣優越的估性能。
  10. Vvvf door controller frequency converter makes lift door installation easier and more convenient as its control center is the internationally advanced engineering 16 digital micro computer and it operates with the fully digital spwm modulation techniques, with igbt module as the output power drive and with voltage, current and speed under fully digital closed circuit control ( the door controller ' s operation parameters are inputted by means of the keyboard )

    Vvvf控制門機變頻器採用當今國際上先進的工控16位微型算機為控制核心,採用了全數字spwm調制技術, igbt模塊作出功率驅動,電壓、電流、速度全數字閉環控制(門機的運行參數均可通過鍵盤) ,從而,使門機的安裝調試更加簡單,方便。
  11. In this article, based on theory of the rcm technology and exception - tree, the equipment - management programmer and the faulty category in dlpec ( dalian petro - chemistry corporation ) are discussed in details, and the equipment - management patterns for the enterprise are brought forward. for all kinds of equipments, some measurements on the maintaining and governing are established ; moreover, the system function mode structure is also schemed out, which responses the working situation of equipment in the enterprise in detail and is composed of equipment technology document - management, equipment document - management, equipment integrating - management, equipment maintaining - plan management, equipment stat. analysis management, integrating - query system etc ; at the same time, the whole system codes are devised, which include equipment category code, engineering planning sort code, spare part sort code, testing report catalogue code of pressure vessel pile, equipment stat

    本文以大連石化公司的備管理程序和備種類為研究對象,應用rcm的技術和故障樹原理,提出了具體的適合於該企業的備管理模式;針對各種不同類型的備,制訂出相應的維修管理對策;並運用信息系統分析與方法,出了比較詳細的、能真實反應企業備工作狀態的系統功能模型結構,包括:備技術文檔管理、備檔案管理、備綜合管理、備維修劃管理、備統分析管理、綜合查詢系統等;同時,出了比較完整的系統代碼,主要包括:備類別編碼、工程劃分類編碼、備品備件類別編碼、壓力容器管道檢驗報告目錄編碼、備統類別編碼等;另外,對數據庫、系統的實施與測試等提出了比較具體的方案。
  12. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低電壓低功耗技術做了廣泛的調查研究,分析了這些技術的工作原理和優缺點,在吸收這些技術成果基礎上了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計輸入級時,為了使共模電壓范圍達到軌至軌,不是採用傳統的差動結構,而是採用了nmos管和pmos管並聯的互補差動對結構,並採用成比例的電流鏡技術實現了級跨導的恆定;在中間增益級中,電流鏡負載並不是採用傳統的標準共源共柵結構,而是採用了適合在低壓工作的低壓寬擺幅共源共柵結構;在出級時,為了提高效率,採用了推挽共源級放大器作為出級,出電壓擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的,採用了帶電流鏡負載的差分放大器了一個基準電流源,給運放提供穩定的偏置電流和偏置電壓,保證了運放的穩定性;並採用了帶調零電阻的密勒補償技術對運放進行頻率補償。
  13. The resonance network is connected to the gate, then the output and input matching network is designed to satisfy the oscillation criteria. then harmonic balance method is used to analysize and optimize the output power and phase noise. to minimize the load pulling effect a buffer amplifier is designed to isolate the oscillator and the load

    本文在場效應管fet柵極上加上諧振網路(諧振網路是通過cst模擬得到的,它是串聯反饋迴路,介質工作在te01模,對于其後的fet ,它又相當於一個帶阻濾波器) ,然後設計輸入出匹配電路,使電路結構滿足起振條件,之後繼續用諧波平衡法模擬和優化,使振蕩器出功率合適,相位噪聲很低。
  14. The accomplished design of iir filter is configured into chip and is tested in experimental circuit after configured. using altera ' s powerful developing software maxplus ii , design entry , design processing and design verification are carried out for all functional modules , and so the whole design is accomplished

    中選用了altera公司功能強大的maxplusii作為開發工具,在這個完全集成化的開發環境中,進行了各個層次的所有功能模塊的設計輸入處理和校驗,完成了iir濾波器的硬體
  15. Registration is begin from design input

    注冊應該從設計輸入開始!
  16. These inputs shall be reviewed for adequacy. requirements shall be complete, unambiguous and not in conflict with each other

    這些設計輸入應被審查其正確性。需求必須完整、明確且不與其它需求相沖突。
  17. For specified three work positions as design inputs, the thesis evaluates their geometrical movements of the prime and sub - flaps, and some reasonableness are shown in view of kinematical geometry. the work can provide further aerodynamic analysis with variable wing geometrical data

    以三縫襟翼的3個假定的工作位置作為設計輸入,算出了3種不同軌道下襟翼的運動結果,並從幾何角度進行了簡單對比分析,為進一步的氣動分析提供數據。
  18. In this article, we study the implemetation of fpga for elliptic curve digital signature algorithm. based on number thesis 、 abstract algebra and complex thesis , integrated information theory 、 cryptography and some specific relevant algorithm , we ascertain the implementation of ecdsa for hardware project : according to the design idea of hiberarchy and modularization, we adopt very high speed ic hardware description language ( vhdl ) as design input and simulate the design in every level and every model for the correct of the fundamental design. after finish the top design, we perform the whole simulation. then , we carry out the timing simulation after the logic synthes and layout

    本文從實際應用出發,研究了橢圓曲線數字簽名演算法的fpga的實現:以基本的數論理論、抽象代數和復雜度理論為依據,結合信息論、密碼學的一些知識以及一些具體的相關演算法,確定了ecdsa的硬體實現方案:按照層次化、模塊化的思想,採用硬體描述語言vhdl作為設計輸入進行ecdsa的硬體;在每個層次和每個模塊都進行了模擬驗證,得以保證底層的正確性。在確保每個模塊的正確后,完成對電路的頂層,進行總體的模擬。
  19. Mostly, this design employs mentor corporation software " fpga advantage " as exploitation tool to perform design input 、 simulation and logic thesis with every level and every model to finish the fore design ; then, choices the xilinx corporation product xcv1000 of the vertex series and employ its tool “ allicance series ” to implement layout and timing simulation

    主要採用menter公司的功能強大的fpgaadvantage作為開發工具,進行了各個層次、各個模塊的設計輸入、模擬以及邏輯綜合,完成了電路的前端;然後選用xinlinx公司的fpga的vertex系列的xcv1000 ,用xinlinx公司的allianceseries工具,進行布局布線,然後再進行時序模擬,生成配置文件。
  20. There are five sections in the part of structured system design, which are module structure design, data access design, code design, input design and output design respectively

    結構化系統分為模塊結構、數據存儲、代碼山西醫科大學2002年碩士學位論文幾個部分。
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