跨導計 的英文怎麼說

中文拼音 [kuàdǎo]
跨導計 英文
gm meter
  • : 動詞1 (抬起一隻腳向前或向左右邁) step; stride 2 (兩腿分在物體的兩邊坐著或立著) bestride; stra...
  • : 動詞1. (引導) lead; guide 2. (傳導) transmit; conduct 3. (開導) instruct; teach; give guidance to
  • : Ⅰ動詞1 (計算) count; compute; calculate; number 2 (設想; 打算) plan; plot Ⅱ名詞1 (測量或計算...
  1. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中,首先介紹模數轉換器的各種參數的意義,以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案,引入級聯結構調制器,特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設的sigma - delta調制器採用2 - 1級聯結構和一位量化器,調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設,包括放大器、開關電容積分器、量化器、兩相非交疊時鐘等,並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後,利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。
  2. Reduce inter - generational poverty by launching a head start programme on child development

    推出兒童發展先劃,減少代貧窮
  3. The simulative circuits of active network elemellts and analog signal operation based on ota are induced systematically

    論文研究運算放大器及其濾波器電路的原理和設
  4. The analysis of the three parameters indicates that the ota designed and improved in the dissertation is better than classical bipolar otas in terms of

    三項指標的分析表明,論文所設的改進的ota的在穩定性方面比經典的雙極型ota具有更好的性能。
  5. After introduction of the tranlinear loop principal, the bjt current controlled conveyor has been designed by using mixed tranlinear loop voltage follower. as for modern integrated circuit, the model of mos transistor, the active resistance and the current mirror integrated circuit formed by mos transistor are introduced. the cmos current controlled conveyor has been derived from mixed tranlinear loop cmos voltage follower based on weak inversion operation

    針對現代集成電路的工藝,本文對mos晶體管的工作原理進行了簡要的敘述,討論了有源電阻和電流鏡的實現方法,並利用mos晶體管的亞閾值特性組成混合線性迴路完成對應的電壓跟隨器的設,推出了基於cmos技術的電流控制傳送器。
  6. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低電壓低功耗技術做了廣泛的調查研究,分析了這些技術的工作原理和優缺點,在吸收這些技術成果基礎上設了一個1 . 5v低功耗軌至軌cmos運算放大器。在設輸入級時,為了使輸入共模電壓范圍達到軌至軌,不是採用傳統的差動輸入結構,而是採用了nmos管和pmos管並聯的互補差動輸入對結構,並採用成比例的電流鏡技術實現了輸入級的恆定;在中間增益級設中,電流鏡負載並不是採用傳統的標準共源共柵結構,而是採用了適合在低壓工作的低壓寬擺幅共源共柵結構;在輸出級設時,為了提高效率,採用了推挽共源級放大器作為輸出級,輸出電壓擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的設,採用了帶電流鏡負載的差分放大器設了一個基準電流源,給運放提供穩定的偏置電流和偏置電壓,保證了運放的穩定性;並採用了帶調零電阻的密勒補償技術對運放進行頻率補償。
  7. The whole pwm circuit contains two subcircuit, the front - end is pwm module that make up of the counter that based on nine mosfet true - single - phase - clock d flip - flop ; the back - end is demodulated module, which is consist of a three order chebyshev low - pass filter used trans - conductor capacitor. all the subcircuits are simulated. at last, an approving simulated result of the whole circuit is given too

    在調制部分,利用九管單相時鐘d觸發器構成數器,並由此組成了脈沖寬度調制電路,同時給出了在典型溫度下的模擬結果;在解調部分,介紹了低通濾波器從無源到有源的設方法,設了三階切比雪夫低通電容濾波器,同樣給出了相應的模擬結果;最後,作為將脈沖寬度調制電路和濾波器作為整體電路,以脈沖調頻波為輸入進行了模擬,取得了令人滿意的結果。
  8. In the chapter 4, the basic concept and characteristics about the current model circuit and transconductor ( gm ) are given. in order to optimize the performance of gmce, four linearization techniques and the design of consequently successful circuits are investigated and proposed. at last, the four linearization techniques are summarizes

    第四章討論了電流模式電路及器的基本概念及性能特點,重點研究並給出了改善輸入級傳輸特性的線性程度並擴大線性范圍的四種方法,介紹在這方面比較成功的一些電路設,總結了這四種方法的異同點。
  9. The chip is accomplished in the full cooperation with other team members, the author pays particular attention to the analysis of the whole chip architecture and three sub - block design : transconductance amplifier ( ota ), voltage reference and current reference. based on existed technologies, a new high order temperature compensated voltage reference and a creative current reference with high order temperature compensation are shown respectively. the author simulated all the sub - block and whole chip by hspice

    該晶元的設是由小組成員共同完成,本人主要負責了總體電路的分析、聯合模擬驗證及以下三個子電路的設: 1 、放大器,詳細分析了bandgap放大器輸入級的動靜態特性及其優缺點,並結合系統要求,設了一種與cmos工藝相兼容、可替代bandgap放大器的低壓共源共柵放大器。
  10. After structure design aimed to high transconductance, parameters of device structure are modified in detail. the simulation results of soi nmos with strained si channel show great enhancements in drain current, effective mobility ( 74 % ) and transconductance ( 50 % ) beyond conventional bulk si soi nmosfet. the strained - soi nmosfet fabrication process is proposed with lt - si ( low temperature - si ) technology for relaxed sige layer and simox technology for buried oxide

    其次,根據器件參量對閾值電壓和輸出特性的影響,以提高器件的和電流驅動能力為目的設了strained - soimosfet器件結構,詳細分析柵極類型和柵氧化層厚度、應變硅層厚度、 ge組分、埋氧層深度和厚度以及摻雜濃度的取值,對器件進行優化設
  11. Using sige bicmos darlington configuration as the input stage, the input resistance is increased by the mos devices while the transconductance of sige hbts is maintained. in the same time, the equivalent input noise is controlled well because of the sige hbts ’ good noise performance in the input stage

    輸入級的設採用sigebicmos達林頓結構,在保留sigehbt高優勢的基礎上充分利用mos器件來提升運放輸入電阻,此外,基於輸入級中sigehbt良好的噪聲特性,運放的輸入參考噪聲電壓可以大大降低。
  12. Physics device model, component structure design and fabrication technology are discussed based on the thorough analysis of strained silicon and soi physics mechanism. the detail contents are as follows. the analytical threshold voltage model, drain current model and transconductance model are derived from poisson ’ s equation for the fully depleted strained soi mosfet

    本論文圍繞這一微電子領域發展的前沿課題,在深入分析應變硅和soi物理機理的基礎上,對器件的物理模型、器件結構設和工藝實驗等問題作了研究,主要包括以下幾部分:首先,從器件的物理機制出發,建立主要針對薄膜全耗盡型器件的閾值電壓、輸出電流和模型。
  13. Specifically analysed and presented the common - mode differential input stage, linear transconductance control circuit of input stage, current sum circuit, floating ab - class control output stage, the bias circuit of op amps and the bandgap reference current source circuit

    具體對運放的共模差分輸入級、輸入級線性控制電路、電流和電路、浮動ab類輸出級電路、運放的偏置電路和帶隙參考電流源電路進行分析設
  14. In the fifth chapter, the performance of transconductor - capacitor ( gm - c ) continuous time filter is discussed. due to process variation and parasitics, an automatic tuning is designed for center frequency and quality factor q. also, in this chapter, a two order bandpass filter with tunable is designed. the effects on filter ' s performance of the non - idealities of a cmos ota are studied and the computer simulations at the mos transistor level are carried out

    第五章討論了電容連續時間濾波器的性能特點,設了一個中心頻率可調的二階帶通濾波器,為了使濾波器參數自動調整到設標準值,從而保持其設值的實現精度,論文給出了片內自校正(可調諧)環節。
  15. Also discussed the methods on how to realize the cwt both in time - domain and frequency - domain and how to design the gm - c bandpass filter used in realization of cwt. in order to optimize the performance of gm - c filter, linearization techniques are investigated and proposed. due to process variation and parasitics, an automatic tuning is designed for center frequency / 0 and quality factor q also, in this thesis, 16 - channel analogue cmos cwt circuit has been realized

    論文圍繞連續小波變換的模擬電路實現這一熱點問題,討論了連續小波變換的時域和頻域實現方法;具體分析了并行結構與串列結構的優缺點;研究了頻域法中的-電容帶通濾波器的設;給出了改善輸入級傳輸特性的線性程度並擴大線性范圍的具體方法;設了片內自校正(可調諧)環節使濾波器參數自動調整到設標準值;最後給出了16通道濾波器組實現小波變換的方法。
  16. The 2 - stage differential transconductance amplifier is used in the design to achieve high gain. in the design of amplifier, a resister and a miller capacitor is used to deal with the stability and frequency compensation

    系統中採用差分運算放大器的設,為了保證其具備高增益與高穩定性,選用二級結構,並且增加了補償電容和電阻。
  17. According to the specification and the scheme three architectures including a gmc ( transconductor capacitor ) filter, a sc ( switched capacitor ) filter and a si ( switched current ) filter are researched and implemented, simulated in 0. 18m cmos process. the results are as expected

    根據系統要求及設方案,分別研究並得到了電容、開關電容和開關電流三種濾波器結構,採用0 . 18mcmos工藝進行模擬,其結果與預期的基本符合。
  18. In the fourth chapter, a fourth - order chebyshev low - pass filter employs new low voltage, highly linear, wide inputting range transconductor is proposed, then we presents a new circuit to tune gm value of transconductor accurately, which employs a new switched - capacitor circuit to change the bias current of transconductor, a third order elliptical function low - pass filter with accurate tunable frequency has been designed using transconductor that is not only with voltage common - mode negative feedback, but also with varying bias - triode transistors which can improve the linearity of this circuit

    第四章:提出了一種新的低電壓、高線性度、寬輸入范圍,並由此設實現了四階切比雪夫( chebyshev )低通濾波器,接著提出了一種寬輸入范圍且具有電壓共模負反饋的全差分,並採用一種新的開關電容電路實現值gm精確可調,從而可以設得到高性能具有精確截止頻率的-電容三階橢圓函數濾波器。
  19. Organized seminars on co - ordinated community and criminal justice response - from uk to hk and batterer intervention programme and outcome effectiveness in hong kong to discuss a holistic responding mechanism and strategies in combating domestic violence from policy to implementation levels

    舉辦界從英國到香港社區與刑事司法合作研討會及香港施虐者輔劃及服務成效研討會,共同探討如何強化本地機制的方案及服務規劃;
  20. A switch ic for analog signal processing is designed and implemented, which can fulfill the functions of sampling, weighting, controlling and summing of high frequency analog signals. the circuit consists of three parts : four channel analog switches, a voltage reference and the control circuitry. each analog switch is comprised of two high - transconductance n - mosfets with high w / l ratio, which realize the fine tuning and coarse tuning of the input signal respectively

    本文研究並設了一種可對高頻信號進行取樣、加權、控制、疊加的模擬信號處理丌關集成電路,它包括模擬開關、電壓基準源和移位寄存器三個功能模塊,通過兩個高寬長比的高nmos晶體管實現權值的粗調和微調。
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