載晶元板 的英文怎麼說

中文拼音 [zǎijīngyuánbǎn]
載晶元板 英文
chion board
  • : 載Ⅰ名詞(年) year : 一年半載 six to twelve months; six months to a year; 三年五載 three to five ...
  • : Ⅰ形容詞(光亮) brilliant; glittering Ⅱ名詞1. (水晶) quartz; (rock) crystal 2. (晶體) any crystalline substance
  • : Ⅰ名詞1 (片狀硬物體) board; plank; plate 2 (專指店鋪的門板) shutter 3 [音樂] (打拍子的樂器) ...
  1. This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga

    本課題主要針對星并行計算機體系結構及軟體結構的特點,從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星多cpu并行計算機體系結構的系統級容錯模型研究,提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究,提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略,同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術,提出了對容錯模塊這一星并行計算機關鍵部件的兩級容錯方案,實現該方案所需增加的電路少,可避免以及fpga內部任何邏輯發生單點故障。
  2. The leec biochip can be connected with pcb ( printed circuit board ), thus it can generate a moving electric field by changing time, scope and field intensity discretionarily under single chip processor ' s control. meanwhile it is probable to reduce driving voltage and decrease temperature greatly, and so increase resolution of dna separation

    研究內容包括線性分散式電極陣列的理論設計,以普通波片和有機高聚物pdms ( polydimethylsiloxane )為基本材料的製作工藝, leec和pcb的連接方式,硬體控制系統的設計以及控制工作的單片機程序編制等,此外還包括電化學檢測方法的研究。
  3. Finite element method ( fem ) was used to simulate thermal and vibration problems in stacked - die csp assembly. finite element models and apdl programes were built in ansys to conduct thermal, thermal - mechanical and vibration analysis. the aim of these researches were trying to find some possible reasons and trends which affect the reliability of stacked csp / bga assembly and give some useful suggestions for the packaging design

    本論文正是針對以上情況,以採用引線鍵合工藝的三維疊層csp / bga封裝(裸疊裝)為研究對象,在有限分析軟體ansys中建立相關的有限模型,編制了相應的apdl參數化分析程序,進行了溫度場分析、熱循環加下的snpb合金焊點疲勞分析和實裝pcb的振動模態分析。
  4. Chip on board co

    載晶元板
  5. Chip on board

    載晶元板
  6. Why have i not got any sound after the intro movies ? i have a motherboard with onboard sound

    為什麼在開場動畫后我就聽不到任何聲音了?我使用的是主音效
  7. The early motherboard can be connected the pci display card by a pci interface, while an agp interface insert at the motherboard by an agp display card

    功能比較齊全、性能強大。而顯卡則簡單得多,它的顯示集成在主的北橋中,而相關的電路則集成在主上。
  8. Moreover, video control program to implement internal function of fpga is designed including video capture time sequence control, ping - pang frame buffer read and write time sequence control and lcd display time sequence control, and program ' s simulation and analysis is also provided. at last, this paper presents a portable iv ' s video processing system, and proposes three buffer strategy to control capture buffer. and a moving object detection algorithm of combing an adaptive background subtraction technique with a three - frame differencing is adopted

    設計了基於fpga系統結構的車視頻顯示電路;利用單片機io口模擬i2c時序,實現了視頻解碼控制;利用fpga實現視頻控制,研究了採集通道時序控制、雙幀存ram讀寫時序控制及lcd顯示時序控制的方法,並進行了軟體模擬和分析;設計了車視頻檢測系統方案,給出了管理採集緩沖區的三幀緩沖策略,採用綜合三幀差分和自適應背景相減的演算法實現運動檢測,連通體檢測去除虛目標,模擬實驗證明其有效性,同時分析了該演算法在dsp視頻檢測系統中的簡單實現方法。
  9. Its driver control logic was realized by means of digital integrated circuit in which the pld chips utilized as the carrier. the vhdl, which is the ieee standard design language of integrated circuit, is used as the behavior description language. the compilation, synthesis, simulation and programming are fulfilled in the maxplusii

    設計的重點是驅動,其驅動控制邏輯以pld體通過數字集成電路方式實現,控制邏輯的功能設計是用ieee標準的集成電路設計語言vhdl作為行為描述語言,在maxplus武漢科技大學碩士學位論文環境中進行編譯、綜合、模擬和編程。
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