轉換塊 的英文怎麼說

中文拼音 [zhuǎnhuànkuāi]
轉換塊 英文
transducer block
  • : 轉構詞成分。
  • : 動詞1. (給人東西同時從他那裡取得別的東西) exchange; barter; trade 2. (變換; 更換) change 3. (兌換) exchange; cash
  • : 名詞(古時佩帶的玉器) penannular jade ring (worn as an ornament in ancient china)
  • 轉換 : change; transform; convert; switch
  1. Class use a chaining mode called cipher block chaining, which requires a key and an initialization vector to perform cryptographic transformations on data

    類派生的類使用一種稱為密碼鏈接( cbc )的鏈接模式,該鏈接模式需要密鑰和初始化向量才能執行數據的加密
  2. The block cipher classes provided in the base class library use a chaining mode called cipher block chaining, which uses a key and an initialization vector to perform cryptographic transformations on data

    基類庫中提供的密碼類使用稱作密碼鏈( cbc )的鏈模式,它使用一個密鑰和一個初始化向量( iv )對數據執行加密
  3. The system comprises three modules : the first is the ccd driver module, which controlled with cpld. programming the cpld to produce ccd driving pulses and synchronized communication signals. after preprocessing, the output video signals are transmitted into high resolution adc module, in which they are converted into digital signals, and then processed in arm processing module

    整個系統分為三個模: ccd驅動模的核心是一片復雜可編程邏輯器件( cpld ) ,對其編程產生ccd的驅動脈沖及同步控制信號;視頻輸出信號經預處理后,由高精度ad進行采樣,將ccd輸出的模擬信號成數字量;最後,將數據送入arm處理系統中進行后續處理。
  4. Secondly, it describes the hardware system of the exoskeleton hand, including the circuit design of the driver, the fpga - based motion controller, the processing and the a / d conversion for the sensor signal

    其次,設計了外骨骼手底層控制系統的硬體電路,包括微型驅動器模電路的設計,基於fpga的運動控制器電路的設計,傳感器信號調理以及模/數電路的設計。
  5. Customize for the infra to radio

    客戶可定做紅外到無線的
  6. Minute hardness testing systems, hardness meters vickers, rockwell, shore, metalloscopes, magnetic detectors, demagnetizers, metallographic inspection devices, surface roughness meters, electrical micrometers, air micrometers, mu meters, electrical converters, bore micrometers, cylindrical gauges, block gauges, eccentricity meters, precision bases, others

    微小硬度系統硬度計維克斯洛氏邵氏金屬顯微鏡磁力探測機脫磁機金屬組織檢查裝置表面粗糙測定器電微型壓力機空氣微型壓力機微米表電器鏜孔微型壓力機缸徑規規偏芯測定器精密加工臺等等。
  7. Our video post - processing algorithm can only convert several tipycal types of interlaced signals to de - interlaced signals. while the 21 types of video display formats must be achieved by video display module. in this dissertation. we provide the design method of video display module in detail based on the introduction of multiplicate video display formats. at the mean time, in order to improve image quality further, by analyzing and comparing a variety of currently popular image sealer methods. we provide a alternative way for selecting appropriate image sealer methods

    視頻后處理演算法只針對幾種典型的輸入制式進行隔行變逐行的,而多達21種的視頻顯示格式主要通過視頻顯示模來完成,因此,本文在介紹多種視頻顯示格式的基礎上,詳細介紹了針對我們目前版本的視頻后處理晶元視頻顯示模的設計方法,並且為了在視頻后處理晶元的后續版本中,進一步提高視頻顯示的質量,本文對圖像插值的方法也進行了探索,通過比較和分析目前多種流行的圖像插值方法,得到了后續版本圖像插值方法選擇的方向。
  8. The outmost layer ( c - layer - communication layer ) deals with i / o issues between the ums and outside communication world ; the inner most layer ( k - layer, kernel layer ) involves internal management and message storage ; while the middle layer ( a - layer - auxiliary layer ) plays the go - between function between layers c and k. as the core component in layer k, the ums mail server is responsible for the storage, transmission and management of the system driven by the layer - k state machine

    文中設計的zhx - ums是一個三層系統,最外層( c層?通信層)處理ums和外部通信世界的i o問題;最內層( k層?核心層)負責內部的消息管理和消息存儲;中間層( a層?輔助層)處理c層與k層之間的通信及消息格式。 ums郵件服務器是系統三層體系結構中k層的核心模,在k層協議機驅動下完成存儲、發及管理等任務。
  9. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中,本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平、 dsp工作電源校正電路和ac - dc電源等模設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信,同時系統電路配置成中斷響應方式,這樣既滿足了系統要求,又充分利用了tms320f2812的硬體資源。在軟體設計中,本文完成了人機界面功能模、遠程控制模、 ad擴展模、 da擴展模、速度和加速度狀態反饋的控制演算法的程序設計。
  10. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中,首先介紹模數器的各種參數的意義,以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案,引入級聯結構調制器,特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器,調制器採用全差分開關電容電路實現;同時對整個調制器的各個模進行了電路設計,包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等,並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後,利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。
  11. This paper focuses on the core part of the il & sm fixture system - information process system ( ips ). after relevant information is obtained from the current part, ips designs the roughcast and the parameters of stuffing, matches or designs rational locating box, positions all the locating bolt, finishes the procedure of datum conversion and ensures the communications between state shaping system, part fixing system and nc programming system

    本文的研究對象為il & sm夾具系統的核心部分? ?信息處理系統( informationprocessingsystem ? ips ) ,它通過獲取零件的相關信息,進行毛坯與填料厚度的設計,設計或配置出合理的尋位箱,智能布置尋位元件,完成基準,並負責與狀態成型系統、工件安裝系統、 nc編程系統等模的通訊。
  12. The expression language includes a cast operator that supports casting between string, numeric, date, and binary data types

    表達式語言包含支持在字元串、數值、日期和二進制大型對象( blob )數據類型之間進行運算符。
  13. During the period of measurement, the transduction circuits transform the differential pressures, the absolute pressures and the temperatures received by the sensors into the voltage signals, and then, the voltage signals are transformed into digital signals by the a / d convertor. the mcu processes these digital signals and calculates the cumulation of the flow. finally the totalizers contact with the pc by rs - 485 bus to form a distributed measuring network

    在測量過程中,系統以流量計節流所獲得的差壓信號作為主信號、絕壓和溫度信號作為補償信號進行流量積算,這三種信號分別由相應傳感器感知后,經各自的物理信號測量電路為電信號,再由a / d變為數字量,交微控制器進行處理、積算。
  14. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模、 fpga視頻處理模、視頻數據幀存模、基準時鐘產生模、 d a編碼模、 i ~ 2c總線控制模等部分軟、硬體設計及調試。其中a d解碼模採集模擬電視信號實現視頻解碼; fpga視頻處理模對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制;視頻數據幀存模為大量高速的視頻數據提供緩沖區;基準時鐘產生模通過輸入基準視頻信號為系統提供精確的相關同步信號; d a編碼模在視頻處理模的控制下把數字視頻數據成復合電視信號供顯示用: i ~ 2c總線控制模模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  15. The analog signals are regulated to satisfy the system and analog - to - digital converter ( adc ) ; dsp is the core part and is connected with adcs, a controller of ethernet, a rs - 485 bus transceiver, a can bus transceiver and a clock. the real - time data is disposed by dsp and is transferred to the upper computer when the alarm is happened

    模擬信號調理模對輸入的信號進行調理,以達到系統和模數器( adc )采樣的要求; dsp作為系統的核心部件,外擴了adc 、以太網控制器、 rs - 485總線收發器、 can總線收發器和時鐘晶元, dsp對實時數據進行處理,當報警發生時將實時數據通過以太網上傳給上位機。
  16. The process plan module includes input of part information, translation between the part information and database, and auto creation of sequence files ; the route plan module can design the part route on some shop floor, and the bill of processes also can be auto created

    工藝過程規劃模完成了零件信息的輸入、信息與數據庫之間的以及加工單元設備運行控制文件的自動生成。路徑規劃模用以指定零件加工物流路徑和工藝過程清單的自動實現。
  17. According to the program structure of ansi c, some syntax - tree - nodes are designed in front - end, including function, block, data structure, type, expression, identifier and so on. syntax tree is divided into three levels, namely program level, function level and block level, which are useful for analysis of syntax and semantic in compiler as well as transferring syntax tree into rtl. retargetable compiler mainly includes intermediate representation, machine description and interface technique between compiler and machine description

    編譯前端的實現技術包括詞法分析、語法語義分析和中間代碼生成技術等,針對ansic的程序結構,分別設計了函數、、數據結構、類型、表達式、標識符等語法樹結點,並將語法樹分成編譯層次、函數聲明和三個不同層次,使語法樹具有清晰的層次結構,有利於編譯程序的語法和語義分析,以及從語法樹到rtl中間表示的
  18. These modules provide interfaces to be used directly from userspace : raw character access, raw block access, ftl flash transition layer - a type of filesystem used on flash, and jfs or journaled file system - which provides a filesystem directly on the flash rather than emulating a block device

    這些模提供從用戶空間直接使用的介面:原始字元訪問、原始訪問、 ftl (閃存層, flash transition layer用在閃存上的一種文件系統)和jfs (即日誌文件系統, journaled file system在閃存上直接提供文件系統而不是模擬設備) 。
  19. The dac consists of analog circuit blocks and digital circuit blocks, so it is a mixed signal circuit. because the digital part is simple comparatively, we use the same method as analog part to design it

    採用模化的設計方式實現數據快速,主要包括電流源矩陣模、鎖存模、譯碼模、帶隙基準電壓源模及電流開關網路等電路模
  20. Scanning the formation - evolutionary histories of continental orogenic belts in both our country and whole workd, an orogenic belt has often undergone numerous and various tectono - evolutionary stages, such as palaeo - continental break - up, ocean - land transition, continental matching - collision, intracontinental extension - basin - range coupling, new tectonic uplift ( intracontinental orogeny ), etc., which are respectively companied with characteristic volcano - magmatism

    縱觀我國以至全球的大陸造山帶形成-演化歷史,一個造山帶往往經歷了古大陸裂解、洋陸、陸拼合-碰撞、陸內伸展-盆山耦合和新構造隆升(陸內造山)等?多不同的構造演化階段,這些不同的構造演化階段和不同的構造環境均有特定火山巖漿作用與之相伴。
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