邏輯布線 的英文怎麼說

中文拼音 [luóbùxiàn]
邏輯布線 英文
logic wiring
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 線 : 名詞1 （用絲、棉、金屬等製成的細長的東西） thread; string; wire 2 [數學] （一個點任意移動所構成的...
  • 邏輯 : logic
  1. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  2. The risc mcu core is based on harvard architecture with 14 - bit instruction length and 8 - bit data length and two - level instruction pipeline the performance of the risc mcu has been improved by replacing micro - program with direct logic block

    設計的riscmcu採用14位字長指令總線和8位字長數據總線分離的harvard結構和二級指令流水設計，並使用硬布線邏輯代替微程序控制，加快了微控制器的速度，提高了指令執行效率。
  3. The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl

    該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。
  4. Describes the design and realization of partial run - time reconfigurable fpga in detail. in order to reduce the affect of the reconfiguration time on system execution time, mostly static circuit design method in logical design stage and incremental routing method in component implementation stage are proposed. the fft parallel processing algorithm is examined through vvp platform

    本章詳細闡述了基於vvp平臺的多sharc功能插板的具體硬體實現，以動態重構fpga設計為核心，論述了局部動態重構fpga設計流程和方法，提出了極大靜態電路邏輯設計方法和遞增式布線方法，以達到減小動態重配置時間，提高系統運行效率的目的。
  5. The soft core design of 16 - bit microprocessor realizes all the required functions, which are verified with fpga test bench ( for example, the controller is implemented with hard - wired logic ). with the design of the microprocessor some design ideas are implemented and some valuable experiences are accumulated

    本文是對微處理器設計中一些設計思想的實現（如採用硬布線邏輯來實現微處理器控制器） ，並積累了一些寶貴的設計經驗，可為其他設計提供有益的參考。
  6. We use different commercial eda tools in order to achieve better implementation in different design phase, which include silicon ensemble of cadence, design compiler and design primer of synopsys and so on

    在設計的不同階段使用了不同的主流eda工具進行輔助設計和驗證，包括synopsys公司的邏輯綜合工具designcompiler 、靜態時序分析工具designprimer和cadence公司的自動布局布線工具siliconensemble等。
  7. Based on analyzing the relationship between linear separability and a connected set in boolean space, the particular effect of a restraining neuron in extraction of rules from a bnn is discussed, and that effect is explained through a example called a mis problem in boolean space. in this paper, a pattern match learning algorithm of bnns is proposed. when a bnn has been trained by the algorithm, all the binary neurons of hidden layer belong to one or more ls series, if the logical meanings of those ls series are clear, the knowledge in the bnn can be dug out

    另一個研究成果是在分析線性可分和樣本連通性關系的基礎上，以mis問題為例，討論了抑制神經元在二進神經網路規則提取中的獨特作用，提出了二進神經網路的模式匹配學習演算法，採用這種演算法對布爾空間的樣本集合進行學習，得到的二進神經網路隱層神經元都歸屬於一類或幾類線性可分結構系，只要這幾類線性可分結構系的邏輯意義是清晰的，就可以分析整個學習結果的知識內涵。
  8. Mostly, this design employs mentor corporation software " fpga advantage " as exploitation tool to perform design input 、 simulation and logic thesis with every level and every model to finish the fore design ； then, choices the xilinx corporation product xcv1000 of the vertex series and employ its tool “ allicance series ” to implement layout and timing simulation

    設計主要採用menter公司的功能強大的fpgaadvantage作為開發工具，進行了各個層次、各個模塊的設計輸入、模擬以及邏輯綜合，完成了電路的前端設計；然後選用xinlinx公司的fpga的vertex系列的xcv1000 ，用xinlinx公司的allianceseries工具，進行布局布線，然後再進行時序模擬，生成配置文件。
  9. So the sta ( static timing analysis ) step and the iteration between synthesis and p & r ( place & route ) were integrated in the dsm design flow

    因此，需要在深亞微米設計流程中加入靜態時序分析環節，以及邏輯綜合和布局布線之間的迭代過程。
  10. The digital one includes spec, verilog coding, simulation, synthesis, floorplan, routeing, static timing analyze and drc / lvs check

    數字電路設計流程則包括：制定spec ， verilog代碼編寫，模擬，邏輯綜合，布局，布線，靜態時序綜合和drc lvs檢查。
  11. Earlier, he was director of product marketing for knight ridder information services in palo alto, california, where he directed development of one of the first commercially deployed online relevance ranking engines and menu - driven boolean search services for consumers

    他在蘋果電腦前是加州palo alto的knight ridder information services的產品行銷主任，負責為消費者開發第一個商業化的線上相關性排名引擎，以及開發由功能表驅動的布林邏輯運算boolean搜尋服務。
  12. Wired or logic

    布線或門邏輯
  13. The design phase includes the standardization of rtl coding, logic synthesis and place & route ; the verification phase includes the function verification, static timing analysis and physical verification for 08c01

    設計工作包括對08c01軟核的rtl級代碼標準化、邏輯綜合和布局布線；驗證工作包括對08c01軟核的功能驗證、靜態時序分析和物理驗證。
  14. Next, the article has inspected the planning process for inland water transportation from the planning subject and its characteristics, from the planning phases and its space in narrow sense, from the planning of timing and its objects etc. and has put forward a concept of multi - dimensional space for this planning ( the planning space in broad sense ) for inland water transportation. the inland water transportation planning is categorized in accordance with different features of the variation of all these key multi - dimensional planning elements and development strategy, layout plans, master plans, the five - year plans and annual plans are now in place following the mainline of phased planning features by the order from abstract ( orientation ) to concrete ( maneuverability ), from macro to micro, and from long - term to short - term. the structure of planning is studied according to the different planning features to form a new planning system for inland water transportation and logical relationships among all branches of planning are explored

    論文從規劃主體、規劃性質、規劃層次、規劃空間（狹義空間） 、規劃時間、規劃對象等要素考察內河航運規劃，提出了內河航運規劃多維空間（廣義空間）的概念；按照規劃多維空間變化要素的不同特徵對內河航運規劃進行分類；按照規劃層次特徵和規劃由抽象（方向性）到具體（操作性） 、由宏觀到微觀、由遠到近的發展順序，論證了發展戰略、布局規劃、總體規劃、五年計劃和年度計劃的邏輯主線；按不同特徵研究了各類內河航運規劃的結構方式，構建了一個新的內河航運規劃體系；探討了各類規劃相互之間的邏輯關系。
  15. Analyzing much experiment result, the paper presents a logical controlling method based on pan - bool algebra and constructs the controlling model in allusion to the non - linear, time - varying, delaying do control system

    在分析了大量實驗數據的基礎上，針對微生物深層發酵過程中非線性、大滯后、時變的溶解氧系統，建立了基於泛布爾代數的邏輯控制模型。
  16. The time range of this research is from 1840 to 2003, the recent times is about 160 years. according to educational system, curriculum planning, physical education curriculum standard of primary and middle schools issued by chinese governments in recent times, the author makes systemic description and analysis on the course of developing evolvement of physical education curriculum over one hundred years in recent times through the method of document, investigation, historical studying, logical analysis and comparative study. based on it, the historical experience and lesson of physical education curriculum developing evolvement are discussed and summed up, and makes prospect on chinese characteristic physical education curriculum in the future

    本課題研究對象的時間跨度涉及到從1840年鴉片戰爭到2003年，中國近現代約160餘年的時間，本課題以近代以來歷屆中國政府頒布的有關普通中小學教育的學制、課程（教學）計劃、體育課程標準（體育教學大綱）為主要歷史發展線索（研究對象實體） ，在馬克思主義辯正唯物主義和歷史唯物主義理論的指導下，遵循歷史與邏輯的統一、歸納與演繹的統一、經驗與思辨的統一等基本研究原則，運用文獻資料法、調查研究法、歷史研究法、邏輯分析法、比較研究法等，討一百多年來我國近現代體育課程的發展演變過程，進行系統的描述和深入的分析，並在此基礎上，探討總結我國近現代體育課程發展演變的歷史經驗和教訓，並對未來有中國特色的體育課程做出展望。
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