鎖計數 的英文怎麼說

中文拼音 [suǒjìshǔ]
鎖計數 英文
lock count
  • 鎖 : Ⅰ名詞1 （安在開合處使人不能隨便打開的器具） lock 2 （姓氏） a surname Ⅱ動詞1 （上鎖） lock up 2 ...
  • 計 : Ⅰ動詞1 （計算） count; compute; calculate; number 2 （設想; 打算） plan; plot Ⅱ名詞1 （測量或計算...
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 計數 : count; tally; counting計數卡 numbered card
  1. The channel counter and decoder provide the channel select information to the data latch and transmit logic circuits.

    通道計數器和解碼器向數據鎖存和傳送邏輯電路提供通道選擇信息。
  2. Decrements the lock count on the writer lock

    減少寫線程鎖上的鎖計數。
  3. Methods use interlocks to update the counter value

    方法使用聯鎖更新計數器值。
  4. In addition, make out in detail the design on inner combination logic and time logic of fpga, including series - parallel conversion, data selector, counter, flip - latch, timer, encoder, etc. at one time, not only pursuit flow of the data gathering system is illuminated, but also make use of in reason and effectively inner ram resource of fpga and build it in ping - pong framework

    另外，詳細的介紹了fpga內部的組合邏輯和時序邏輯的設計方案，包括串並轉換、數據選擇器、計數器、鎖存器、定時器、譯碼器等。並闡述了數據採集系統的工作流程，而且合理有效地使用了fpga內部的ram資源，將其構建成乒乓式結構。
  5. After that, the hardware circuit, especially some of the key parts, is investigated in detail. the following processes are also investigated in detail : empoldering the four fold - frequency subdivision 、 direction - judgment 、 counting and flip - latch of the data with vhdl ( very high speed integrated circuit hardware description language ) ; empoldering the serial interface and the data collection software in pc with borland c + + builder

    接下來詳細介紹了使用vhdl語言開發fpga晶元的細分、辨向、計數、鎖存以及串列傳輸處理等全部功能;用borlandc + + builder開發了pc機上的串列介面、數據採集軟體;設計並製作了fpga晶元及其外圍電路的電路板。
  6. The four fold - frequency subdivision 、 direction - judgment 、 counting and flip - latch of the data which come from the six encorders are totally transacted in the fpga chip. the final data are sent to the pc through the serial interface of the fpga

    坐標測量儀的六個編碼器所傳出的數據完全在fpga晶元中進行細分、辨向、計數以及鎖存傳輸處理，最後所得的數據以串列通訊的方式傳送到pc機。
  7. This counter is incremented at the start of a latch wait

    此計數器在閂鎖等待啟動時遞增。
  8. Lock and thread performance counters

    >鎖定和線程性能計數器
  9. Thus the principle to deal with the four basic waveforms is put forward and a new phase - demodulation circuit is designed. experiments for the two circuits on same gyros are made and they indicate clearly that the mdrlg ' s null - shift problem consists in the faultiness of the old phase - demodulation circuit

    在此基礎上，提出了處理計數信號過鎖區波形的基本原則，進而設計了新的鑒相電路，並在同一陀螺上對兩鑒相電路進行了對比實驗。
  10. Firstly, computer model of mdrlg is set up for simulation purpose. by simulation about the two output signals of mdrlg, four basic waveforms between the two signals in lock - in area are found out and the fact is discovered that the old phase - demodulation circuit introduces errors when it is used for demodulating two of the four basic waveforms

    本文首先建立了機抖陀螺的計算機模擬模型，利用該模型對陀螺兩路計數信號及原有鑒相電路進行了模擬，發現兩路計數信號過鎖區時存在四種基本波形，且原有鑒相電路對其中兩種波形產生鑒相誤差。
  11. Discarded objects always have a lock count of zero

    被清除的對象的鎖定計數器的值始終為零。
  12. Methods to forward lock counts to mfc by calling

    方法，以將鎖計數轉發到mfc 。
  13. Class, use these lock count methods

    類，請使用這些鎖計數方法。
  14. Decrements the lock count

    減少鎖計數。
  15. Class that only apply to the current thread, helping to prevent one thread from editing another threads lock count

    類的靜態方法，僅應用於當前線程，有助於防止線程編輯其他線程的鎖計數。
  16. The system is based on chopper constant current drive technique, according to the top level design idea, adopting advanced specical subdivision control integrate circuit and powerful function 80c196kc to organize the system frame, desiging the minimum system of single - chip microcomputer, multifunction i / o interface circuit, relay switch circuit, keyboard and display circuit, multifunction digital setting interface circuit and so on, utilizing the hso and hsi interface circuit which are owned by this single - chip microcomputer exclusively and its powerful command system to realize dual - degree switch control, automation orientation, automatically searching zero position, locking machine when stopping, frequency to set digitally, automatically adjusting speed through changing frequency, swithing subdivision or squarewave control, on the basis of above, the system also have the function of running according to the setting steps and the frequency, voltage and current to display through the led, etc

    系統基於斬波恆流驅動技術，按照頂層設計思想，採用先進的專用細分控制電路和功能強大的80c196kc單片機來組建系統構架，設計了單片機最小系統、多功能i o介面電路、繼電器切換電路、鍵盤顯示電路和多功能數字設定介面電路等，利用該單片機獨有的hso和hsi介面及其強大的指令系統，實現了雙余度混合式步進電動機的余度切換控制、自動定位、零位自動搜索、停機鎖定、數字化頻率設定、自動調頻變速控制、細分方波切換控制，在此基礎上，該系統還設有按預置步運行、 led頻率電壓相電流顯示等功能。
  17. Some automotive applications are antilock brakes, “ smart ” shock absorbers, vehicle counting systems, and ignition timing and control systems

    汽車上的應用包括防鎖死煞車、智慧型避震器、車輛計數系統，點火時間與控制系統。
  18. Compared with digital integrator composed of reversible counter, the trapezoidal formula digital integrator is utilized in integrating element of phase - lock controller, it has advantages in simple realization, fast transient response, wide lock range, insensitivity to disturbance

    對鎖相控制的積分環節採用了梯形公式數字積分器，與可逆計數器構成的數字積分器相比，梯形公式數字積分器具有實現簡單、動態響應快、入鎖范圍大、抗擾動能力強等優點。
  19. The time division circuit and latch counter are integrated in one chip of programmable logic device, which makes the size greatly decreased

    同時採用cpld晶元實現了時間分割電路和計數鎖存電路，有效地減小了電路體積。
  20. The program counter is a latch with the extra ability to increment by 1 when told to do so, and also to reset to zero when told to do so

    程序計數器也是個鎖存，但還能夠在指示下遞增1 ，還能夠在指示下復位為0 。
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