鑒頻器 的英文怎麼說

中文拼音 [jiànbīnqì]
鑒頻器 英文
frequency discriminator; discriminator; frequency-modulation detector; frequency detector; frequency sensitive detector; slope detector
  • 鑒 : Ⅰ名詞1 （鏡子 古代用銅製成） ancient bronze mirror2 （可以作為警戒或引為教訓的事） warning; objec...
  • 頻 : Ⅰ形容詞（次數多） frequent Ⅱ副詞（屢次） frequently; repeatedly Ⅲ名詞1 [物理學] （物體每秒鐘振動...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  1. Capacity analysis of rc bridge phase discriminator

    橋式相位鑒頻器的性能分析
  2. Automatic discriminator switching

    自動鑒頻器轉換
  3. Phase detection discriminator

    鑒相鑒頻器
  4. The pll consists of a crystal oscillator, a ring voltage - control - oscillator, a frequency divider, a phase / frequency detector, a charge pump and a loop filter

    設計的電路包括20mhz晶體振蕩器，鑒頻鑒相器，壓控振蕩器，固定分頻器，電荷泵和低通濾波器。
  5. The designs of the pfd, digital filter ocxo and fractional - n counter in the frequency synthesizer unit are discussed, based on the pll theory. in order to improve the precision of pll, some design methods of pfd are given, and its feasibility is validated by the fpga hardware implement

    2 .在鎖相理論指導下，第三章討論了頻率合成器設計中的鑒頻鑒相器、數字濾波器、恆溫壓控振蕩器和分頻電路設計。為了進一步提高頻率合成的精度，文中給出了提高鑒頻鑒相器性能的一些設計思想，結合fpga的硬體設計驗證了其可行性。
  6. As we have introduced a multilevel decision method with discriminator detection to improve the error rate performance, the deducing and analyzing for this method are present in this article. the theoretical error rate and the monte carlo simulation result are showed in figure to compare the system error rate performance affected by different premodulation filter

    在系統誤碼模擬中引入了一種有助於改善誤碼性能的鑒頻加多電平判決的解調方法，文中對此方法也進行了詳細的推導和分析，並給出根據此方法計算出的誤碼理論值，結合系統誤碼性能的蒙特卡羅模擬值，對比分析各種預調濾波器對系統誤碼性能的影響。
  7. For digital audio encoding and decoding modules, delta - sigma modulation is introduced and audio data, preambles with accessorial data are multiplexed according to the digital audio interface standard ; for carrier wave, pll frequency synthesizer is used ; for frequency modulation, voltage control oscillator is taken ; for demodulation, pll frequency discrimination is adopted

    調制方式，並按照數字音頻介面標準對音頻數據、同步字和附加信息進行通道復用;對于載波信號，採取鎖相環頻率合成技術手段;對于頻率調制，採用壓控振蕩器;對于解調電路，採取鎖相環鑒頻電路。
  8. In an fm receiver, the limiter and discriminator stages are circuits that respond solely to changes in frequency

    在調頻接收器中，限幅器和鑒別器這兩個設備僅對頻率的變化做出反應。
  9. A device that converts a property of an input signal, such as frequency or phase, into an amplitude variation, depending on how the signal differs from a standard or reference signal

    鑒別器，鑒頻器一種將輸入信號的某一特徵，如頻率或相位轉變為幅度變化裝置，其變化大小因信號與標準或參考信號的不同程度而異
  10. Research on chaotic phenomena of phase - locked frequency detector with triangular phase - detector

    三角形鑒相特性鎖相鑒頻器中混沌現象的研究
  11. Semiconductor integrated circuits detail specification for type jb726 limit amplifier discriminator

    半導體集成電路. jb726型限幅放大鑒頻器詳細規范
  12. Finally introduced the method that use adf4113 and provied the real test result of this multi - frequency, low phase noise pll frequency synthesizer with 30mhz working band and 1mhz frequency step. in addition, some method that solved the problem often occurred was introduced

    最後給出了由ad公司的電流泵數字鑒頻鑒相器adf4113和無源環路濾波器構成的頻率合成器的控制方法和實驗測試結果，實現了工作帶寬30mhz ，頻率步進1mhz的多點頻、低相噪頻率合成器。
  13. We provide rf assemble as well, including power splitters, amplifiers, phase detectors, attenuators, synthesizers, multiplexer and radar receiver subassemblies for rf application

    射頻組件包括功分器，放大器，鑒相器，衰減器，頻綜，倍頻組件，雷達接收組件等。
  14. In this method, the phase difference between two compared signals that have same nominal frequency can be converted into voltage signal by phase detector. the voltage signal varies linearly with the phase difference and can be displayed or recorded by some instruments

    此方法是將兩個被比對的標稱值相同的標準頻率信號之間的相位關系，通過線性鑒相器轉換成與它成線性關系的電壓信號，並通過相應的設備進行顯示紀錄。
  15. In this paper, a pll frequency synthesizer working in l band is researched. at fist, we review the basic of phase lock loop and it ' s constituent part. after that the basic conception and design method of pll frequency synthesizer was introduced, especially introduced the charge pump pll frequency synthesizer in detail

    本文是採用鎖相原理設計的l波段頻率合成器，首先對鎖相環路的工作原理和基本組成部分進行了簡單的介紹，然後介紹了鎖相頻率合成器的原理和設計方法，主要介紹了目前小型頻率合成器產品中使用最廣泛的由電荷泵數字鑒頻鑒相器和無源環路濾波器構成的頻率合成器。
  16. First, an analysis for the design of the impulse phase lock oscillate, which includes impulse phase detector the dielectric resonant oscillate etc. secondly, presents an analysis for the design of wide band balanced low noise amplifier. the last two part simplify the theory and the electrical characteristics of the sub harmonic mixer, and the mmvco

    第一部分著重介紹了脈沖鎖相源的工作原理（主要包括取樣鑒相器和介質穩頻的壓控振蕩器） ，並介紹了研製結果的性能指標;第二部分介紹了平衡式寬帶低噪聲放大器的基本理論
  17. The thesis describes a prototype fractional frequency synthesizer which is supported by a project granted by the ministry of science and technology of pr china. firstly, based on the principle of pll, this paper briefly describes three basic pll components : phase detector ( pd ), low pass filter ( lpf ), voltage controlled oscillators ( vco ), analyzes the linearized pll and summaries the transfer functions of third - order pll with ideal intergrator filter respectively. based on a microwave vco, the single point frequency pll frequency ranging from 2. 2 to 2. 5ghz is developed

    首先，從鎖相環的基本理論、原理出發，分析了鎖相環中的三個基本部件：鑒相器、環路濾波器和壓控振蕩器，此後，針對線性化鎖相環進行了分析，研究了在使用比例積分濾波器時，三階鎖相環的環路參數計算；在電路實現時選用了lmx2353 ，在此基礎上，完成了2 . 2 ~ 2 . 5ghz范圍內的小數頻率合成器設計。
  18. On the basis of analyzing the old system and theory, the element circuits of wireless digital audio transceiver modules are designed in detail including the digital audio encoding and decoding circuits with the surrounding circuits, the fsk circuit based on pll frequency synthesizer, the power amplifier circuit, the frequency discrimination and agc circuit

    在分析原系統結構和理論的基礎上，完成了整個無線數字音頻傳輸模塊各單元電路的設計。主要包括有數字音頻編碼和解碼電路及外圍電路的設計、基於鎖相頻率合成器理論的fsk電路設計、功率放大器的設計、鑒頻與agc控制電路的設計。
  19. The main contribution of the thesis is seen as follows : aiming at the fault with slow speed and high power dissipation of the conventional phase - frequency detector, a high speed and low power dissipation phase - frequency detector is designed by modifying the structure of the single phase lock dynamic d flip - flop and adding the delay cell in the feedback loop to eliminate the phase detector ’ s dead zone effectively

    論文的主要貢獻為以下幾個方面: 1 .針對傳統鑒頻鑒相器速度慢、功耗高的缺點，改進了單相時鐘動態d觸發器的結構，設計出了一種高速低功耗的鑒頻鑒相器，在反饋迴路上加入延遲單元，能有效的消除鑒相死區。
  20. But its performance is as same as common pll at a 5v voltage. so the pll performance is better than other plls at a 5v voltage, especially in power consumption and frequency. finally, the improved pll circuit used in the frequency synthesizer is composed of the improved vco, phase / frequency detector and charge pump. hspice simulation results show that the pll performance is better than other plls implemented by other vco in the same cmos technology

    綜合以上的研究與設計，本文用所改進的壓控振蕩器、無死區鑒相器及電荷泵電路組成了用於頻率合成的鎖相環電路，並對此電路進行整體設計及模擬，結果表明其在鎖定時間、頻率范圍、輸出相位抖動及功耗方面具有較好的性能，且對提高鎖相環頻率合成器的整體性能有一定的作用。
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