電路噪聲電平 的英文怎麼說

中文拼音 [diànlùzàoshēngdiànpíng]
電路噪聲電平 英文
circuit noise level
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 噪 : 動詞1. （蟲或鳥叫） chirp 2. （大聲叫嚷） make noise; make an uproar; clamour
  • 平 : Ⅰ形容詞1 （沒有高低凹凸 不頃斜） flat; level; even; smooth 2 （高度相同; 不相上下） on the same l...
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. In designing analogic circuit, we adopt programmable filter max262 to meet the system ' s command. after the step, we can make the signal ' s frequency width is wider and noise level is lower. to make the signal ' s amplitude to meet the analogic to digital device ' s command, we adopt the max551 to finish the gain control

    在模擬電路部分，採用可編程濾波器max262 ，這樣就滿足了該數據採集裝置所採集的信號的頻率范圍較寬以及具有較低的噪聲水平的要求，為了使采樣到的信號的幅度滿足後面a d轉換器的要求，採用max551對采樣到的信號進行調理（增益控制） 。
  2. Secondly, compared with some other kinds of comparator structure and based on the preamplifier - latch fast - compare theory, a novel topology of cmos preamplifier latch comparator circuit is presented. considering trade - off between kickback noise and power dissipation, reference resistance value is optimized. according to the encode demands of different stage resolution, clock - control encode circuit is designed

    其後，在具體的子adc設計中，對比各比較器類型的優缺點，並基於預放大鎖存快速比較理論，提出一種新型高速低功耗預放大鎖存比較器電路拓撲;根據adc系統所允許的參考電壓最大波動限制，在回饋噪聲對輸入參考電平的影響和功耗之間折衷，確定優化的參考電阻串阻值;根據不同級精度的編碼要求，設計出時鐘控制編碼電路。
  3. The result of experiment is excellent, the signal - noise rate is high and the system is effective

    實驗結果良好，電路噪聲水平與動態范圍滿足要求，系統可行。
  4. The study provides one methodological design on multi - band planar metamaterials, to be applied in antenna substrate and noise suppression in microwave circuits

    該研究提供了一種多帶的平面型異向性結構的設計思想，在天線基板和微波電路噪聲抑制中具有廣泛的應用。
  5. The resonance network is connected to the gate, then the output and input matching network is designed to satisfy the oscillation criteria. then harmonic balance method is used to analysize and optimize the output power and phase noise. to minimize the load pulling effect a buffer amplifier is designed to isolate the oscillator and the load

    本文在場效應管fet柵極上加上諧振網路（諧振網路是通過cst模擬得到的，它是串聯反饋迴路，介質工作在te01模，對于其後的fet ，它又相當於一個帶阻濾波器） ，然後設計輸入輸出匹配電路，使電路結構滿足起振條件，之後繼續用諧波平衡法模擬和優化，使振蕩器輸出功率合適，相位噪聲很低。
  6. With the improvement of technology of digital circuit, making use of digital circuit to produce noise has become reality. for example, m sequence has been maken as mask jamming source, but its applications are limited because of its linearity and finite amount

    隨著數字電路技術水平的提高，利用數字電路來產生噪聲已成為現實。例如， m序列已經作為雷達干擾信號的噪聲源，但它的應用受到其線性性和有限數量的限制。
  7. Besides, we use software smooth filtering to minish the influence of white noise and high - frequency noise, ground connection and shield technology to eliminate electromagnetic interference, and rational circuit distribution to attain high signal - to - noise of the whole fiber optic weak magnetic sensor system

    另外，採用軟體平滑濾波等處理以減小白噪聲和高頻噪聲的影響，利用接地及屏蔽技術消除外界的電磁干擾，並對電路進行合理布局布線，以獲得高信噪比的光纖微弱磁場傳感器系統。
  8. In the sixth chapter a low noise amplifier whose operating frequency is 6ghz 12ghz is presented. it is a balanced amplifier. in this chapter we discuss the calculation of lange coupler, the matching of balanced amplifier and the influence of thin film mic in the design

    第六章設計的6ghz 12ghz的低噪聲放大器為平衡放大器，詳細討論了蘭格耦合器的計算、平衡放大器中匹配電路的設計和薄膜mic工藝對電路設計的影響。
  9. In receive channel, the low noise amplifier make the signal which received from the antenna enough strong to demodulation

    而低噪聲放大器用於接收鏈路中放大天線接收到的微弱信號，使信號電平達到解調單元所能分辨的電平。
  10. In view of the importance of rf front - end circuits in the receiver system, the paper finally is focused on the analysis and design of the rf front - end circuits, including the design of low noise amplifier ( lna ), microstrip filter and balanced mixer. all the circuits above are simulated individually using ansoft serenade, and the results are satisfying with the desired performance

    考慮到射頻前端電路性能的好壞會直接影響到整機的性能，文中還重點論述了該接收機射頻前端電路的分析和設計，主要包括低噪聲放大器、微帶濾波器和單平衡混頻器的理論分析和實際設計，並在ansoftserenade環境下進行了模擬模擬，模擬結果符合設計要求。
  11. The new eats is capable of responding automatically to the ambient noise level, i. e. its output will be higher under noisy environment and will reduce automatically if the environment is quiet

    新的電子行人過路發聲裝置有隨環境噪音水平自動調節輸出音量的功能；即是在高噪音環境下輸出較大音量和在寧靜環境下自動調低輸出音量。
  12. We choose hb qrc convert as the research object. this paper has completely analyzed the circuit work modes, designed an experimental device, analyzed the mam noise source, established the common - mode and different - mode noise current models, extracted the parasitic elements of four pcb layout and simulated each emi level. based on these, it has derived the element which have great effect on pcb emc and has designed the optimized pcb layout

    選擇一種半橋準諧振變換器作為研究對象，對其工作原理進行了詳細的分析，製作了實驗樣機，分析了它的主要干擾源，建立了它的共模、差模噪聲電流等效電路模型，對它的四種不同pcb布局進行了寄生參數提取和電磁兼容模擬，在此基礎上分析得到了影響其電磁噪聲水平的最重要因素，並設計出了最優的pcb布局。
  13. We decide to use seven - sections coupled - line filter after comparing the various filter circuits, and complete the quantitative analysis and optimization design by ads, hfss etc. ( 2 ) three - stages fet low noise amplifier according to the lna ’ s design theory and guide line, we decide to use ne3210s01 fet and choose the form of three - stages, thus we can achieve high stability, low noise and high gain

    通過對各種帶通濾波器電路方案進行比較，確定採用七階平行耦合微帶濾波器，並利用ads ， hfss等工具進行了定量的理論分析和優化設計。 （二）三級聯低噪聲放大器根據微波lna設計原理及指標要求，我們選用ne3210s01系列低噪聲管，並採用三級放大的形式，以期獲得高穩定性，低噪聲，高增益。
  14. After comparing with a few traditional methods, i present a type of high - speed dsp circuit and a mathematic algorithm to process order domain analysis and time domain synchronous averaging processing for vibration and noise signal

    在比較幾種傳統方法后，提出了採用高速數字信號處理器dsp電路和插值演算法來進行噪聲信號的時域同步平均處理。
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