高速數據線 的英文怎麼說

中文拼音 [gāoshǔxiàn]
高速數據線 英文
hsdl
  • : Ⅰ形容詞1 (從下向上距離大; 離地面遠) tall; high 2 (在一般標準或平均程度之上; 等級在上的) above...
  • : Ⅰ形容詞(迅速; 快) fast; rapid; quick; speedy Ⅱ名詞1 (速度) speed; velocity 2 (姓氏) a surna...
  • : 數副詞(屢次) frequently; repeatedly
  • : 據Ⅰ動詞1 (占據) occupy; seize 2 (憑借; 依靠) rely on; depend on Ⅱ介詞(按照; 依據) according...
  • : 名詞1 (用絲、棉、金屬等製成的細長的東西) thread; string; wire 2 [數學] (一個點任意移動所構成的...
  • 高速 : (高速度) high speed; high velocity (hv); high rate; swift; fast; express; high-speed
  • 數據 : data; record; information
  1. Application of windriver on the development of data sampling card driver

    採集卡的驅動程序設計
  2. This high - speed data acquisition card designed is based on pci bus and have high capacity memory interface. it combines high - speed date acquisition and high capacity real - time memory

    為此,本文設計了一款基於pci總且具備可擴展大容量存儲設備介面的模擬信號採集卡,將採集和大容量實時存儲結合在一起。
  3. From its realization, the local short - delay interconnection method, the coding symbol synchronization method of multidimensional tcm, and the reliable receiving structure of high - speed dada are advanced

    同時根工程實踐總結了vd基於網格圖的短時延局部連設計方法、接收端的多維tcm編碼符號同步方法,設計了的可靠接收結構。
  4. In the following chapters, a 16 - channel experimental phased array ultrasonic testing system is thoroughly explained, including digital beam forming, low noise programmable amplification of received ultrasound signal, multi - channel hi - speed hi - precision data acquisition, hi - speed real - time processing of multi - channel ultrasound signal, and hi - speed data transfer based on pci bus. in addition, the frame of software system is built

    本文詳細闡述了作者所獨立研製的16通道相控陣超聲檢測實驗系統,包括字化超聲發射/接收波束形成、超聲信號的低噪聲程式控制放大、多通道精度採集、多通道超聲信號實時處理、基於pci總傳輸等全部電路模塊的結構及工作原理,並說明了所編寫的底層軟體系統的框架。
  5. Realization of multi - channel high - speed data acquisition and throughput system based on vxibus

    的多通道採集和留盤系統的實現
  6. The tramsission rate exceed to the range of isa bus, moreovcr the pci bus can be competent for the rate request. the card makes use of the total line in pcicontroller, the slice of fifo, fpga and super - speed a data correspondence chip, which can solve the transmission stream and total line in pci connecting problem. and realizes the mpeg - 2 deliver to flow with establish outside delivers

    率超過了isa總所能支持的傳送率,而pci總能夠勝任這一要求,由此確定節目傳輸流發送卡採用pci總。此卡利用pci總控制器、 fifo晶元、 fpga晶元、串列通信發送晶元,解決傳輸流與pci總之間的介面問題,實現了mpeg - 2傳輸流與外設的傳輸。
  7. When you build the house, you can install a single high - speed data line from one room to the street

    當您建造房子的時候,您可以安裝一條從房間到街道的單一的高速數據線
  8. In this thesis, i completed the software and hardware designing of high speed communication card based on pci & dsp

    論文完成了基於pci總和dsp的傳輸介面電路卡的硬體及軟體的設計。
  9. Information processing. connectors for interchange circuits between data terminal equipment and high speed data transmission equipment. pin assignments

    信息處理.終端設備和傳輸設備間互換路的連接器.插針的配置
  10. Popular video dsp systems in today ' s market cannot process data both flexibly and at real time. therefore, this paper proposes a real time video dsp platform design scheme based on fpga and pci bus, and introduces the method to construct high - speed data transmission interface with plx pci9054

    針對當前市場上主流視頻dsp系統在處理的靈活性和實時性上不能兼顧的不足,本文提出了基於fpga及pci總的實時視頻dsp平臺設計方案,並重點介紹利用pci介面晶元pci9054搭建傳輸介面的具體實現方法。
  11. This link may be a high - speed data communication circuit, a local area network ( lan ), a telephone live or a radio channel

    這種連接的鏈路可以是通信電路、局域網( lan ) 、電話路或無通道。
  12. The high - speed data communication based on pci bus between the two pcs is discussed in two aspects ( hardware and software ) in the paper

    本文從硬體和軟體兩個方面對基於pci總的pc機通信進行了研究。
  13. However, the power line has largely been dismissed as being too noisy and unpredictable to be useful as a practical high - speed communication channel

    然而,電力由於其自身的噪聲嚴重和不可預測的特點,而很少作為通信通道。
  14. The task in the paper comprises two parts. the software design procedure works as follow, program the drivers for module on pc with cvi, generate the corresponding ddl and then edit the test serial and invoke the ddl by designing soft panel with vc + + 6. 0. thus facilitate users to control module to conduct high speed data test. the hardware design procedure works as follow, design vxi message based interface circuit and plesio - fdc circuit with fast data transport function on xc2vp30, a virtex - ii pro series fpga chip designed by xilinx company which integrates power - pc processor

    筆者負責的工作包括軟體設計和硬體設計兩部分:軟體設計是用cvi工具編寫模塊在pc機上的驅動程序,生成動態連接庫,再用visualc + + 6 . 0設計軟面板,實現測試矢量的編輯和動態連接庫的調用,讓用戶很方便地控制模塊進行測試;硬體設計是在xilinx公司的一片集成了power - pc處理器的virtex - iipro系列fpga晶元xc2vp30上完成vxi總的消息基介面電路設計和具有快傳送功能的準fdc電路[ 1 ] [ 2 ]設計。
  15. The hardware designing include the interface with engine controller, such as d / a conversion. we chose the ad75089 which was produced by ad corp. this is a parallel port digital to analog conversion, and i give the presentation about its structure and connection scheme. in order to resolve the contradiction between faster computation and slower display, a buffer storage also needed

    第二部分詳細陳述了傳輸卡的軟、硬體設計過程,硬體設計包括dsp與pci總的介面、 dsp與外部控制器的介面、以及電路卡上的擴展緩沖區的設計,並使用專門的工具軟體protel繪出全部硬體電路的設計原理圖。
  16. In this system, it is master - slave structure between pc and dsp. dsp transfers data to pc by adopting the dmac ( direct memory access controller ) in pc. the thesis dwells on every part of hardware circuit and main technology such as dsp, the transferring mode of dma ( direct memory access ), etc subsequently, it introduces the software design of the sampling system and user interface

    該最小系統製作成採集卡,插入pc機的isa總插槽中, pc機與dsp構成主從結構,系統中tms320f240dsp作為pc機的下位機,採用pc機內的dmac ( dma控制器)通過dma (直接存儲器存取)方式把採集的傳送到pc機進行處理。
  17. With the increasement of instruments and the information shared between them in ultra - precision measurement, the measurement and control networks constructing by rs - 232, rs - 485, can and gp - ib can no longer meet the requirement of high - speed data exchanging between measuring instruments

    隨著超精密測量過程中儀器設備的增加以及各種儀器間共享信息量的增大,採用傳統rs - 232 、 rs - 485 、 can 、 gp - ib等總為主導將測量儀器設備組成測控網路的模式已經不能滿足測量儀器之間交換的需求。
  18. The main research issues consist of following aspects : 1. based on non - real - time ethernet and windows2000, we research how to meet the real - time requirement for hsm working procedure, via using shared data buffer to resolve the conflict between high - speed data acquisition and low - speed data process, then combine hsm features, correctly set priority among processes and threads, and compositively use software and hardware technical

    主要內容為: 1 .詳細研究了在採用非實時的以太網( ethernet )和windows2000操作系統基礎上,如何通過使用共享區緩沖、解決採集與低處理分析的矛盾,結合熱連軋的工藝特點,合理設置進、程優先級,綜合運用軟、硬體措施滿足象熱連軋生產過程這樣的快過程的實時性要求。
  19. Design of logic control circuits, device driver and application of the high - speed data communication system based on pci bus are completed. with s5933 bus master ( dma ), bidirectional and high - speed data transmission are realized

    本文完成了基於pci總的雙機通信系統的邏輯控制電路設計、驅動程序及應用程序的開發,實現了s5933總主控( dma )方式的雙向傳輸功能。
  20. Fifo data channel of pci interface chip s5933 and approach of realizing pci bus master dma through the fifo is introduced in detail. the reason for choosing s5933 ' s fifo to transfer data at high speed is clarified. secondly, the design process of hardware is introduced

    文中首先介紹了pci總的協議,討論了pci介面的實現途徑,並詳細介紹了pci介面晶元s5933的fifo通道及其總主控dma方式的實現方法,闡明了選用s5933的fifo通道進行通信的原因。
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