高電平輸入 的英文怎麼說

中文拼音 [gāodiànpíngshūrù]
高電平輸入 英文
high level input
  • 高 : Ⅰ形容詞1 （從下向上距離大; 離地面遠） tall; high 2 （在一般標準或平均程度之上; 等級在上的） above...
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 平 : Ⅰ形容詞1 （沒有高低凹凸 不頃斜） flat; level; even; smooth 2 （高度相同; 不相上下） on the same l...
  • 輸 : Ⅰ動詞1 （運輸; 運送） transport; convey 2 [書面語] （捐獻） contribute money; donate 3 （失敗） l...
  • 入 : Ⅰ動詞1 （進來或進去） enter 2 （參加） join; be admitted into; become a member of 3 （合乎） conf...
  • 高電平 : high level; up level
  • 輸入 : 1 （從外部送到內部） import 2 [電學] input; entry; entering; in fan; fan in; 輸入變壓器 input tra...
  1. Secondly, compared with some other kinds of comparator structure and based on the preamplifier - latch fast - compare theory, a novel topology of cmos preamplifier latch comparator circuit is presented. considering trade - off between kickback noise and power dissipation, reference resistance value is optimized. according to the encode demands of different stage resolution, clock - control encode circuit is designed

    其後，在具體的子adc設計中，對比各比較器類型的優缺點，並基於預放大鎖存快速比較理論，提出一種新型高速低功耗預放大鎖存比較器電路拓撲;根據adc系統所允許的參考電壓最大波動限制，在回饋噪聲對輸入參考電平的影響和功耗之間折衷，確定優化的參考電阻串阻值;根據不同級精度的編碼要求，設計出時鐘控制編碼電路。
  2. 8 test1 i low : for normal operation high : test mode

    測試0口，輸入低電平:正常工作;高電平為測試模式
  3. Ti ? the current into an input when a high - level voltage is applied to that input

    一個高電平電壓信號加到一個輸入端時，流進該輸入（端）的電流。
  4. A large amount of experience data accumulated through long term operation is introduced. combined with the definition of relative requirements, the choosing and definition of operation index of high - frequency channels specially used for protection of hubei electric power network are discussed and elaborated through calculation and analysis such as input impedance and channel impedance of transmitter, sensitive voltage of received signal, redundancy of received signal, warning of channel redundancy and warning of channel faults etc

    引用了長期運行中積累的大量經驗數據，通過計算分析，結合有關規程規定，探討和闡述了湖北電網繼電保護專用高頻通道諸如收信機輸入阻抗及通道阻抗、收信靈敏電平、收信裕度、通道裕度告警、通道異常告警等運行指標的選取和確定。
  5. And pays emphasis on analyzing the system structure and system flow, the core techniques, the channel characteristic and parameters of dvb - t system. the system adopts some core techniques such as cofdm, a lot of tps ( transmission parameter signalling ) insert and guard interval, and so on. so it can withstand high - level ( up to odb ), long delay static and dynamic multipath distortion

    論文首先描述了數字電視地面廣播的需求條件，技術難點和目前存在的問題，並重點分析了dvb - t系統結構流程，核心技術及系統通道特性和參數，該系統採用了cofdm （編碼正交頻分多路復用） ，大量導頻信號插入和保護間隔技術等核心技術，使之能抵抗高電平（ 0db ） ，長延時的靜態和動態多徑失真，有利於數字和模擬電視的混合傳輸，它的多載波調制模式功能和性能在移動和便攜接收、同頻網等方面具有獨特的優勢。
  6. A novel measurement and control system ( mcs ) used in hv flameproof switchgear has been established based on the 80c196kb single - chip microprocessor, by which electrical faults such as short circuit, over - load, over - voltage, open circuit, earth leakage and so on can be automatically distinguished and processed, and with the exception of this, the insulation degree of the double screen cables is monitored on - line. the operating condition and fault parameters can be displayed in turn with liquid crystal display

    該系統能自動判斷短路、過載、過壓、欠壓、漏電等故障，並對高壓電纜的絕緣水平進行實時監測，大屏幕液晶顯示器實現了電太原理工大學碩士學位論文網參數的輪流顯示，通過撥碼盤輸入系統各項整定參數，真正實現了保護系統數字化。
  7. With promulgation and obliging actualization of iec 1000 - 3 - 2 etc. international standards, power factor correction ( pfc ) technique become a hotspot of research in power electronics field. based on average current mode, the paper introduce the design and implementation of a fully digital controlled single - phase boost power factor corrector with fast response. the control - loop circuit is realized using digital control and the corrector can tend to unity power factor, lower current harmonics and high transfer efficiency

    本文在平均電流模式控制的有源功率因數校正技術的基礎上，設計了一種控制電路基於數字信號處理器（ dsp ） 、主電路採用boost變換器拓撲結構的全數字單相功率因數校正器，用數字電路代替傳統的模擬電路來實現對整個迴路的控制，最終使得校正器具有輸入功率因數接近於1 、低電流諧波以及高轉換效率的特性。
  8. The series h - bridge multilevel converter has the advantages of high output voltage, high power, lower harmonic content in line and motor sides and high input power factor

    串聯h橋多電平變頻器具有輸出電壓高、功率大，輸入側和輸出側諧波含量小，輸入功率因數高等特點。
  9. Note : a minimum is specified that is the least positive value of high - level input voltage for which operation of the logic element within specification limits is to be expected

    注：在限定的工作條件下，規定的最小輸入電壓是極不容易保證邏輯單元所期望的高電平輸入電壓的最小正電壓值。
  10. Jedec ? the current into the output terminal with input conditions applied that, according to the product specification, establishes a high level at the output

    按加到輸入端信號的情況，電流流進一個輸出端，並按照產品的技術規范，在輸出端建立一個高電平。
  11. Aees employs the multi - staged digital filter algorithm to reduce random error. meanwile, the system correct zero deviation through linear opreation. the instrument, from hardware aspect increases the feature of anti - interference by the way of reasonable layout, sepration of digital and analogue

    系統採用了中值濾波和滑動平均濾波相結合的多級數字濾波演算法來減小隨機誤差，並以精密基準電壓作為比較信號的輸入，由智能系統通過線性運算，實時地修正、校準測量數據，減小系統的零漂，實現自動定標並提高測量的精度。
  12. The test results demonstrate that this prototype has excellent comprehensive performances such as small bulk, lower weight, high efficiency, high steady precision, fast dynamic response, wide range input voltage, good output waveforms, strong over - load and short - circuit ability, and strong function with different nature load and three - phase unbalanced load

    試驗結果表明，該變流器具有體積重量小、變換效率高、靜態精度高、動態響應快、輸入電壓變化范圍寬、輸出波形質量高、過載與短路能力強、帶不同性質負載和帶三相不平衡負載的能力強等優良的綜合性能。
  13. In the course of design, we fully consider the actual conditions on the railway and take a series of corresponding measures to the concrete problem. such as we select high - accuracy microconvertor and have the converted function in succession data collecting system chip aduc812, design v / f circuit and external a / d circuit. in anti - interference of the hardware, we try to disperse each function module to avoid interfering each other, adopt photoelectric isolated technology to dispel the circuit connection of input and output. in controlling we import arithmetic mean into strain wave algorithm and real computing technology of virtual value for sample treatment of data, that is using the software to smooth away interfere error and to calculate actual value, thus it makes the precision of the data improve greatly

    在設計過程中，根據系統要求，充分考慮鐵路上的實際情況，針對具體問題採取了一系列的相應措施，如在器件選擇方面選用高精度microconvertor系列、具有adcdma連續轉換功能的數據採集微控制器晶元aduc812 ，設計了v f變換電路和外部a d轉換電路；在硬體抗干擾方面，將每個功能模塊盡量分散獨立開來以避免相互干擾、採用光電隔離技術消除輸入輸出通道上的電路聯系；在控制方面對于采樣數據的處理引入了算術平均值濾波演算法和真有效值的計算方法，即通過使用軟體來濾除系統中有干擾造成的誤差並計算真值，從而使數據的準確性得到極大地提高。
  14. The zero - voltage - switching ( zvs ) pwm hybrid full - bridge three - level ( h - fb tl ) converter can operate in both three - level mode and two - level mode, the output rectified voltage is close to the output voltage over the entire input voltage range, thus the output filter can be reduced significantly, leading to high power density and fast dynamic response. so the zvs pwm h - fb tl converter is very attractive for the applications such as fuel cells, photovoltaic cells, and telecom power supplies, where the voltage varies in a wide range

    零電壓開關復合式全橋三電平（ zero - voltage - switchingpwmhybridfull - bridgethree - level ， zvspwmh - fbtl ）變換器可以工作在三電平模式和兩電平模式，在很寬的輸入電壓范圍內，輸出整流電壓都接近輸出電壓，從而可以減小輸出濾波器，因此可以提高變換器的功率密度和改善動態性能。
  15. Advanced fpga technology is introduced to improve the integration of digital circuits, and all digital circuits in the original module are integrated in the fpga chips, which could not only reduce the cost, but also improve the reliability and measurement precision of the circuits. high speed digital signal processor ( dsp ) is selected as the coprocessor instead of scm ; it can receive all kinds of commands sent from vxi, analyze and execute the commands, harmonize each section of the module and process the data. higher - conversion - speed comparator chip is adopted to convert the input signals being measured into square waveform signals which could be identified by fpga chip ; it can expand the measurement range of frequency dramatically

    本文在原有vxi總線四通道計數器模塊的設計基礎上，通過對原模塊缺陷的分析，採用一些新的技術和新的電子器件來重新設計該計數器模塊:採用最新的fpga技術來提高數字電路的集成度，將原模塊中的所有數字電路全部集成在fpga晶元中，這樣不僅能節約成本，還能提高電路的可靠性和測量精度;採用高速的數字信號處理器（ dsp ）取代原有的單片機作為協處理器，來接收vxi發來的各種命令，分析命令、執行命令、協調模塊各部分的工作以及對數據的處理;採用轉換速率更高的比較器晶元將輸入的被測信號轉換為fpga晶元能夠識別的方波信號，能極大提高測量頻率的范圍;採用d / a轉換晶元和隔離運算放大器得到隔離通道所需的比較電平，該比較電平值能夠根據實際需求進行設置，能增強模塊的使用靈活性。
  16. An improved high - resolution current - mode sorter is presented. its structure complexity is o ( n ), which is crucial to the expansion of its size, and its dynamic range is large. only one clock signal and one reset signal are needed. no biasing signal is required. the operation point is constructed according to the input current, so it is self - adaptive, which is very important for an all - purpose component. in average value circuit, subtraction circuit, winner - take - all ( wta ) circuit and control circuit, it has good performance even at a large input current. this sorter has high precision, high resolution and low power, as has been proved via hspice simulation. it can be implemented in the standard digital cmos technology and widely used in many fields, so it is of great value in applications

    提出了一種改進的高精度電流型排序電路.它的結構復雜性僅為o （ n ） ，便於擴展;動態范圍大;它是自適應的，工作點由輸入電流確定，故不需要偏置信號，這對作為通用器件使用的排序電路來說是很重要的.通過利用平均值電路、減法電路、 wta電路和控制電路，可以使該電路在大輸入電流下依然保持高性能. hspice模擬表明該電路具有高準確性、高精度、低功耗的特點.它能用標準數字cmos工藝來實現，可以被應用於很多領域，具有很高的應用價值
  17. You can even enter voltage values directly in vpp, vrms, dbm, or as high and low levels

    您甚至還能直接輸入vpp vrms dbm或高低電平值
  18. Set the right and left level controls at minimum gain ( counterclockwise ) and adjust the master level control to as high as you will want to listen

    把左右電平輸入設定於最少增益位置（逆時針方向） ，調整主音量控制至你所想要的最高水平。
  19. The third row of the table represents synchronous parallel loading of the register and states that if s1 and s0 are both high, then, without regard to the serial input, the data entered at a is at output qa, data entered at b is at qb, and so forth, following a low - to - high clock transition

    表2中第三行表示計數器的同步平行的加載，和表明如果s1和s0為高電平，那麼它就不是連續輸入，在時鐘由低向高跳變后，在a端的數據輸入則在qa端輸出，在b端的數據輸入將在qb端輸出，等等。
  20. ( 5 ) the developed hv reactive optimal software has both text and graph input platform, and realize the network transmission of text and vector graph by a customized network protocol transform package

    （ 5 ）本文開發的高壓網路無功優化軟體具有文本和圖形兩種輸入輸出平臺，且通過自定義的網路協議傳輸包，可以實現文本和矢量圖形的網路傳輸，是一個非常實用的電力系統高級應用軟體。
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