analog chip 中文意思是什麼
analog chip
解釋
模擬集成電路-
As a mix - mode chip, the application - specific controller including analog signal and digital signal processing block can be applied to receiving, amplifying, processing, controlling signals of pir, and offer a wide application in some fields. in analog circuits, by sub - threshold mosfet, a self - bias current source is presented, which has a high power supply restrain ratio and a complementary to absolute temperature characters
這款晶元是一款數模混合晶元，包括模擬信號處理（含模數介面模塊）和數字信號處理兩大模塊，完整實現對紅外信號的接收、放大、處理、控制，產生有效數字電平驅動繼電器、可控硅等負載，應用於自動燈等多種場合。 -
At present, the typic harmful current detection methods are the fast fourier transform algorithm in frequency domain and methods based on the instantaneous reactive power theory, these methods all require some transform and quick, real - time calculating, so high precision analog multipliers or high speed dsp chip with fast a / d are needed, this results in complex circuit and high cost ， which have restricted the development of apf
目前畸變電流檢測常用的方法有頻域法的fft和基於瞬時無功理論的畸變電流檢測法。這些方法均有一定的變換，需要快速、實時運算，因此必須使用高速的數字微處理器和高性能a / d轉換器，這必將大大提高系統成本，使得電路結構復雜，在一定程度上限制了有源濾波器的發展。 -
The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing
本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。 -
The delay chip, whose delay precision can be 10ps, wide band sample - hold amplifier ( sha ), and high speed and precise analog / digital conversion ( adc ) are used in the system
能夠對5mhz以下的信號進行隨機采樣、波形顯示、頻譜分析，還能夠對採集的波形數據進行存儲、共享。 -
It is not possible to join the two pins within the ic package because the analog part of the converter cannot tolerate the voltage resulting from the digital current flowing in the bond wire to the chip
（過去）無法在晶元內部將二者連接的原因是數字電流流經內部引線電阻產生過大的電壓，晶元的模擬部分無法承受。 -
And i finished the layout design, chip test of line driver and equalizer in 2. 5gbps baseband copper cable transceiver and equalizer in the 1. 5gbps sata transceiver respectively. the main improvements and innovations in this thesis are as follows : 1 、 to design an analog equalizer tuned on - chip for 2. 5gbps baseband copper cable transceiver ; 2 、 to present an adaptive equalizer for 1000base - cx transceiver ; 3 、 to present an auto - gain control amplifier used in the adaptive equalizer for the 1000base - cx transceiver ; 4 、 to present an adaptive continuous - time gm - c filter in very high frequency for the adaptive equalizer for the 1000base - cx transceiver
論文主要的改進和創新有： 1 、設計了適用於2 . 5gbps基帶銅纜收發器系統片上可調的模擬均衡器電路； 2 、提出了一種新的適用於千兆以太網基帶銅纜收發器系統的自適應均衡器結構； 3 、設計了甚高頻自動增益控制放大器； 4 、設計了一種適用於千兆以太網基帶銅纜接收器均衡的自適應甚高頻連續時間gm - c二階帶通濾波器。 -
At the receiving end, a inverse process is performed. the system receives low rate data and the fpga reorganizes a frame of data which is decoded by the compression chip every 20 ms. the obtained pcm signal is performed d / a to restore the analog speech signal
在收端進行相反的過程，接收低碼率數據，並由fpga重新組幀，送至主晶元解碼得到pcm信號，再作d / a變換，恢復出模擬語音，系統是全雙工的。 -
The structure, function and characteristic with the principle and method of tank gauging system are described. then the structure, principle of the circuit and the main chips of the data processing unit are introduced. after this, the software design of data processing unit including rs - 485 ( modbus ) module, 4 - 20ma analog module, on - off module, rtd module, pulse module, calculation and display module, communication module and neuron chip program module and also the method of resolving the problems which were found at the process of debugging are emphasized
隨后介紹了現場數據處理器的結構，電路原理，所運用的主要晶元；並重點闡述了作者在課題研究中所作的工作，即現場數據處理器軟體的設計包括八個功能模塊： rs - 485 （ modbus ）模塊、 4 ? 20ma模擬量採集模塊、開關量處理模塊、 rtd信號採集模塊、頻率量採集模塊、計算和顯示模塊、通訊模塊、 neuron晶元中的程序模塊；以及在課題研究和現場調試過程中遇到的問題及解決辦法。 -
Pll frequency synthesizer is increasingly used in microprocessor systems and communication. with the development of integrated circuits and the emergence of soc ( system on a chip ) technology, it has been a fundamental and very important module in analog and mixed - signal integrated circuits
鎖相環頻率合成器現在日益廣泛地應用於通訊、微處理器系統中，並且隨著集成電路的發展以及soc技術的出現，其已經成為超大規模集成電路中不可或缺的模塊。 -
The design of high - voltage circuit based on pwm technology is briefly described. the closed - loop current control theory using analog instruments is fully discussed, followed which is that using digital instruments. it is an important part that the hardware and software design of the single chip - two arms and two chips - two arms current control circuits with a new chip applicable to digital current control system
簡單介紹了基於開關電源技術的高壓電路設計；詳細講述了模擬穩流電源的閉環穩流原理，並在此基礎上討論了利用數字電路實現穩流的原理及可能性；選擇出適合數字穩流系統的新型晶元，完成了單片雙路穩流系統、雙片雙路穩流系統的軟硬體設計；給出了一種簡單易實現的比例?積分控製程序。 -
First an analog video signal is decoded by saa7 11 a to form a digital video signal complying with ccir6o1 which then is compressed by an special chip ibms42o, at last, the video es is packed with audio es to form ts by computer
具體來說，是把模擬視頻源解碼成符合ccir601規范要求的數字視頻源，經專用的mpeg2編碼晶元壓縮形成視頻es流送入計算機，與一路音頻es流打包復用后形成一路ts流。 -
The control core of the hardware platform is a single chip micyoco mcs - 51, and a time - sharing bus is used to switch the test point in analog experiment and to control the input and output of the digital experiment
本文所討論的硬體平臺的控制核心由mcs - 51單片機擔任，用分時總線控制模擬實驗測試點的切換和數字實驗的輸入輸出。 -
It is widely used in many circuits, such as high precise comparators, a / d and d / a converters, drams, flash memory circuits, and other analog or mixed circuits. therefore, it is significant to develop a voltage reference circuitry that is compatible with digital cmos technology and can be integrated into a system on a chip ( soc )
基準電壓源（ voltagereference ）是超大規模集成電路和系統的重要組成部分，應用於高精度比較器、 a d和d a轉換器、隨機動態存取存儲器、閃存電路等多種電路和電路單元，亦為系統集成晶元（ soc ， systemonachip ）所廣泛採用。 -
Compared with the similar research results, the weighted control ic here has the following characteristics : ( 1 ) the circuit structure is simpler ; ( 2 ) the chip ' s fabrication is compatible with standard cmos process ; ( 3 ) n - mosfets with high w / l ratio and short channels are used for weighting and output to reduce the insertion loss ; ( 4 ) the weighting factor varies in a relatively wide range with the controlling signals ; ( 5 ) input and output impedance approach 50 in low frequency ( e. g. 50mhz ), while in higher frequency they slightly deviate from 50, hence the energy reflection lower than 0. 1 ; ( 6 ) it completes the functions of sampling, weighting, controlling and summing of high frequency analog signals
它的加權控制電路與已報道的相關電路相比具有如下特點：電路結構簡單；製造工藝與普通cmos工藝兼容：短溝道，高寬長比的nmos晶體管具有低的通導電阻，將其作為加權、輸出器件可降低由電路引起的插入損耗；改變加權信號，可實現權值在較大范圍內的連續變化；輸入、輸出阻抗在低頻（如50mhz ）下接近50 ，而在高頻下略有偏離50 ，但反射系數均低於0 . 1 ；實現了對高頻信號的取樣、加權、控制、疊加功能的迭加。 -
The basic principle of natural gamma - ray log is stated, the developing background, developing ways and developing situation of natural gamma - ray tools are introduced. the researching task of the paper is presented through analyzing the using situation and questions exsisted in inner natural gamma - ray tools, the researching work is started from three aspects, they are logging tool development, reliability design and reliability assuring methods, and the data processing methods, in the course of logging tool development, instrument indexes are presented based on the compatible property of sookbps telemetry system and environmental property, the analog measuring chanel and the interface circuit which realizing the compatible performance are designed according to the instrument mdexes. the detecto * design. the plateau property testing of the detector and the analysis of it ' s affecting factors are stated, the measuring property of the tool is discused, a new type of single chip microcomputer is selected when designing the interface circuit, and the laboratory experiments has fulfiled conmunieating standard signals between the interface circuit, the universal interface unit of sookbps telemetry system and also 500kbps telemetry system
本文首先概要介紹了石油測井的基本概念、方法、條件、最新進展、以及應採取的研發對策，論述了自然伽瑪測井的基本原理，介紹了自然伽瑪測井儀的發展背景、發展歷程和發展現狀，通過分析國內自然伽瑪測井儀的使用情況和存在的問題，提出了本文的研究任務。研製工作從測井儀研製、可靠性設計與可靠性保障技術、數據處理方法研究三個方面展開，在測井儀研製過程中，根據500kbps遙傳系統要求的配接性能和使用環境特徵，提出了主要儀器指標，並根據這些指標，設計了儀器模擬測量通道和實現這一配接性能的介面電路；論述了探測器的設計、坪特性影響因素分析及其測試，探討了儀器的測量性能；在設計介面電路時選用了新型單片機晶元，並與500kbps遙傳通用介面單元rtu 、 500kbpa遙傳系統實現了室內配接。 -
In the aspect of hardware design, the single - chip microcomputer " s minimum system is applied to design display device about keyboard operation and dac ( analog - to - digital converter ) which economizes large quantity of hardware resource
在系統的硬體設計方面，對于鍵盤顯示和數-模轉換dac ，採用單片機的非總線應用系統的最小系統，節約了大量的硬體資源。 -
The dissertation discusses about field multi - channel nuclear data collecting system based on mcu in detail. the data collecting system adopts mcu ( micro - control units ) at89c55 as controlling core, applying high speed and low power adcs ( analog - to - digital converters ) cmos chip max 191 and 320x240 matrix graphic lcd ( liquid crystal display )
該系統在硬體上以單片機at89c55為控制核心，以高速低功耗的a d晶元max191作為多道脈沖幅度分析器的模數轉換器件，以320 240點陣圖形液晶顯示屏作為系統的顯示器，根據初步的性能測試，系統已經達到預期的設計目標。 -
On designing of the encoder, by using the decoding for video chip saa7113 made in philips, analog video signal inputted realizes a / d conversion in analog / power block
編碼器的設計中，模擬/電源塊主要實現的功能是對輸入的模擬視頻信號進行a / d轉換，解碼晶元採用philips公司saa7113 。 -
The hardware is a single chip microcomputer system. the cpu of the microcomputer is intel 196kc. the hardware consists of switch signal par, analog signal collecting part, microcomputer and driving part
硬體部分以intel196kc單片機為核心，主要由開關量輸入輸出部分、模擬信號採集部分、單片機部分和驅動部分組成。 -
Direct current, peak to peak amplitude of the measured quantity is implemented. the whole system has the integrated functions of data process, communicate, display, etc. during designing the hardware, in order to improve the whole system ’ s interference immunity, the advantages of small outline ( so ) chip is fully considered by proper redistribution, the analog parts and digital parts are separated by optoelectronic isolator to reduce the interaction
本課題根據黑龍江省計量研究院的要求，依據最新測量理論設計了直流測量模塊，其性能已經達到了萬分之一的精度，實現了一個集直流電壓、直流電流及峰峰值測量於一體，具有數據處理、通訊、顯示等功能的單片機測試系統。
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