bus signals 中文意思是什麼
bus signals
解釋
匯流排信號-
This bus provides clean, concise signals for fetching and storing information.
這種總統提供用於存取信息的完整而簡捷的信號。 -
1. whole signals of pci bus test socket converter extender maybe
1 .所有的轉換卡信號 -
During the period of measurement, the transduction circuits transform the differential pressures, the absolute pressures and the temperatures received by the sensors into the voltage signals, and then, the voltage signals are transformed into digital signals by the a / d convertor. the mcu processes these digital signals and calculates the cumulation of the flow. finally the totalizers contact with the pc by rs - 485 bus to form a distributed measuring network
在測量過程中，系統以流量計節流所獲得的差壓信號作為主信號、絕壓和溫度信號作為補償信號進行流量積算，這三種信號分別由相應傳感器感知后，經各自的物理信號測量電路轉換為電信號，再由a / d轉換模塊轉變為數字量，交微控制器進行處理、積算。 -
The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing
本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。 -
The analog signals are regulated to satisfy the system and analog - to - digital converter ( adc ) ; dsp is the core part and is connected with adcs, a controller of ethernet, a rs - 485 bus transceiver, a can bus transceiver and a clock. the real - time data is disposed by dsp and is transferred to the upper computer when the alarm is happened
模擬信號調理模塊對輸入的信號進行調理，以達到系統和模數轉換器（ adc ）采樣的要求; dsp作為系統的核心部件，外擴了adc 、以太網控制器、 rs - 485總線收發器、 can總線收發器和時鐘晶元， dsp對實時數據進行處理，當報警發生時將實時數據通過以太網上傳給上位機。 -
And the setting standard of bus lane is also studied, which includes the standard of bus speed, the standard of bus flow rate, the standard of road condition. moreover the bus signal priority and the pre - signals are introduced and the bus priority network is planned by using the planning method of urban mass transit network. finally the methods of benefit assessment of bus lane, bus approach lane and bus transport priority network are studied, which takes the travel time of each person as standard
系統地討論了公交專用道、公交專用進口道、公交停靠站的設計方法和它們之間的關系；研究了公交專用道的設置標準，其中包括：車速標準、公交車流量標準和道路條件標準；對公交優先信號、公交預先信號進行了介紹；應用軌道交通線網規劃的方法對公交優先通行網路進行規劃；以人均出行時耗為指標對公交專用道、公交專用進口道、公交優先通行網路的效益評價方法進行了研究，並且建立了數學模型。 -
Autonomous external devices and signals having no bus - compatible signals and no temporal relationship with the system bus signal cannot be connected to the system bus directly
自治的外部設備和信號由於沒有與總線兼容的信號也沒有與系統總線信號的暫時關系（注：實際上是指沒有暫存器）就無法與系統總線直接相連。 -
It has five parts, such as integer execution unit, floating point unit ( fpu ), instruction cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way. the instruction set and i / o signals are compatible with powerpc
它由定點執行單元、浮點單元、指令cache 、總線介面單元、存儲管理單元組成，以流水和超標量方式執行指令，指令集和介面時序兼容powerpc ，是典型的risc微處理器結構。 -
Its principle is as following : acquire and modulate the analog signals from sensors placed in environments through daq device on real time, then transit the information to computers by pci bus ; in the other hand, noise information tested with sound level meter is passed through interface rs - 232 to computers
本系統工作原理為：通過多功能數據採集卡採集來自各種傳感器所採集的各檢測對象的模擬信號，對信號進行調理，通過pci系統總線傳遞給計算機；而噪聲則通過聲級計由rs - 232傳入計算機。 -
Based on can bus, this thesis develops an innovational air preheater leakage control system, with pcs structure to fulfil the optimal control over system structure and the multi - signals transfer
為了優化控制系統結構並解決系統中多種信號的傳遞問題，本課題以can總線為基礎，建立了fcs結構的新一代空氣預熱器密封間隙控制系統。 -
Table 3-25 is a truth table of the 8251 bus control signals.
表3-25是8251總線控制信號的真值表。 -
The author will research two different realizations : 1 ) to design a can bus interface system based on scm system. this interface system would change the digital commands obtained from the c ' an bus into the analog control signals and send these signals to the existing analog electric servos
這項工作將研究兩種實現方案： 1 ）設計一個基於單片機系統的canbus介面系統，用來將can總線上的數字指令轉換為模擬控制信號，送給已有的電動伺服模擬控制系統。 -
The author will research two different realizations : 1 ) to design and realized a can bus interface system based on scm system. this interface system would change the digital commands obtained from the can bus into the analog control signals and send these signals to the existing analog electric servos
這項工作將研究兩種實現方案： 1 ）設計一個基於dsp的can總線介面系統，用來將can總線上的數字指令轉換為模擬控制信號，送給已有的電動伺服模擬控制系統。 -
3. using the vpp code in labview and vxi bus, a softwar is programmed for the driving signals generating and the response signals sampling. the software can process the data to appropriate the exciting force, control the whole test and display the response curves
3 .在labview環境下，調用vpp節點驅動vxi總線來實現多通道正弦激勵信號的生成、響應信號的採集與處理、不同激振力之間的相位協調以及測試結果的動態顯示、儲存。 -
It is made of computer network, plc, and new field bus - profibus, the new control system has been debugged successfully, it ( has collect the signals from the 4mv high voltage terminal through the way of infrared and optical fibres, it ends the history that the 4mv high voltage terminal is a black box
由控制微機，可編程式控制制器和新的工業現場總線? ? profibus組成的加速器控制系統已經調試成功，它把高壓端的信號成功地通過紅外線和光纖通路採集到微機，結束了傳統靜電離子加速器高壓端是個黑匣子的局面。 -
The demodulation circuit interfaced with the local bus, demodulates the signals transmitted on the pstn and restores the acquired data. in order to work nomally, hardware needs cooperation with software. the driver for pci demodulator has been developed
本地總線上掛接解調電路，對傳輸來的信號進行解調，恢復採集的數據。硬體需有軟體的配合才能正常的工作，因此為pci解調器設計了驅動程序。 -
The product has the following characters : all - purpose input, completed separated signal channels, collection of the signal data by scanning, the display technique of lcd big screen, flash memory ; capacious compatible floppy disk, 36 types of signals, multiple alarms, communication of rs232 / 485 and hart confered - link with a view to second generation technique of the field - bus. during the developing course, i used the method of reliability design to design hardware, and researched carefully the process of weak signal. pass to practice, the product has achieved all aim of the design
系統在功能上實現了萬能輸入，信號通道之間的完全隔離，信號的掃描採集，大屏幕lcd顯示技術， flash存儲器進行數據存儲，大容量的具有兼容性的電子軟盤， 36種信號方式，多種報警方式， rs232 / 485通訊，以及著眼于下一代的現場總線技術的hart協議介面等。 -
The digitizer based on pxi bus uses fpga ( field programmable gate array ) to implement 256 points, radix - 2 dit fft ( fast fourier transform algorithm ). the design uses pipelining for fft processing and can accomplish sampling and processing signals of two channels at the same time. in the signal acquisition circuit, - a / d convector is used to enhance the precision of the signal sampling
在本設計中，採用fpga （ fieldprogrammablegatearray ）實現了256點基2dit演算法復數fft （ fastfouriertransformalgorithm快速傅氏變換演算法）處理器，具有較高的速度和運算精度fft ，設計採用流水線處理方式大大的提高了處理速度，可實現對兩個通道輸入信號的并行採集與處理。 -
This paper considers two controllers with different feedback signals ? the ac current phase angle of converter transformer and the ac voltage magnitude of inverter bus, respectively. pscad / emtdc simulation software is used for the controller testing. the test models used for the analysis are the cigre hvdc benchmark systems with different scr at the inverter side
為了驗證該控制方式的有效性，本文採用了電磁暫態模擬軟體pscad emtdc ，在國際大電網會議cigre提出的hvdc標準模型上，用逆變側短路比不同的系統對調制控制器的性能進行了模擬測試，調試出了調制控制器的各參數值。 -
However, it will also receive bus management signals from the bus itself
不過，它也將會收到來自總線本身的總線管理信號。
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