bus signal 中文意思是什麼
bus signal
解釋
總線信號-
It measures fluid pressure in the industry process and converts it into 420 ma dc signal output ; at the same time, by field bus hart protocol
它測量工業過程流體壓力，將其轉化成4ma20ma dc信號輸出。 -
The development of fieldbus technology made lonworks field bus outstanding in all kinds of fieldbus. this paper simply introduces some kinds of common using fieldbus and the important position and influence of lonworks fieldbus in all kinds of fieldbus, carefully describes the technology core of lonworks technology, puts great emphasis on the introduction of the development and design of public security node of intelligent district which adopts computer, communication and control technology, carefully designs the interfaces of hardware circuits. the public security node of intelligent adopts 8031 single chip as its main processor to complete the application program of user, which mainly collects, process and control all kinds of field signal, and neuron chip 3150 as its slave processor to communicate with other nodes on field network, which works under parrel slave a mode
現場總線技術的發展使得lonworks技術脫穎而出，本文簡要介紹了常用的幾種現場總線的概況以及lonworks技術在現場總線技術中的地位和影響，對lonworks技術的技術核心：神經元晶元、 lontalk協議、 lonworks收發器、 lonbuilder及nodebuilder進行詳盡的描述；重點介紹了集先進的計算機技術、通信技術、控制技術為一體的智能小區安防節點的開發與研製，對節點硬體電路的各種介面進行了詳盡的設計。本文設計的智能小區安防節點採用單片機8031作為主處理器來完成用戶的應用程序，主要負責對各種現場信號進行採集、處理及控制，工作在并行從a方式下的神經元晶元mc3150作為從處理器，主要完成與現場網路上的各節點及中心控制室之間的通信工作。 -
Easy to measure pentium - ii bus every pin signal
您想很容易的量到 -
Signal priority operation for bus rapid transit vehicle at the intersection
快速公交車輛平面交叉口信號優先實現方法 -
Study of auto - safety detection system in railway signal lamp based on can bus
總線的鐵路信號燈自動安全監測系統研究 -
The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing
本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。 -
And the setting standard of bus lane is also studied, which includes the standard of bus speed, the standard of bus flow rate, the standard of road condition. moreover the bus signal priority and the pre - signals are introduced and the bus priority network is planned by using the planning method of urban mass transit network. finally the methods of benefit assessment of bus lane, bus approach lane and bus transport priority network are studied, which takes the travel time of each person as standard
系統地討論了公交專用道、公交專用進口道、公交停靠站的設計方法和它們之間的關系；研究了公交專用道的設置標準，其中包括：車速標準、公交車流量標準和道路條件標準；對公交優先信號、公交預先信號進行了介紹；應用軌道交通線網規劃的方法對公交優先通行網路進行規劃；以人均出行時耗為指標對公交專用道、公交專用進口道、公交優先通行網路的效益評價方法進行了研究，並且建立了數學模型。 -
Autonomous external devices and signals having no bus - compatible signals and no temporal relationship with the system bus signal cannot be connected to the system bus directly
自治的外部設備和信號由於沒有與總線兼容的信號也沒有與系統總線信號的暫時關系（注：實際上是指沒有暫存器）就無法與系統總線直接相連。 -
Bus - quiet signal
總線寂靜信號 -
Bus grant signal
總線批準信號 -
If you want to get on a bus at a request bus stop, give a clear signal for it to stop
在某些車站，候車乘客須向行駛中的巴士發出清楚信號，巴士才會停下來，讓乘客上車。 -
The hardware uses a industry control computer based on pci bus, a signal converter and daq ( date acquisition card to develop )
硬體方面採用pci總線工控機、數據採集卡、信號調理器。 -
Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo
本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。 -
The characteristics and the design concepts of the transient electro - magnetic methods system design of predecessors will be analyzed detailedly in this thesis, on the foundation, the transient electromagnetic exploration system based on dsp ( digital signal processor ) and usb ( universal serial bus ) was designed, in which the transmitter and receiver have been integrated together for the sake of better operation for exploration
在總結前人在系統設計的基礎上，成功設計和實現了一套基於dsp （ digitalsignalprocessor ）和usb （ universalserialbus ）技術的瞬變電磁探測系統，本論文就該系統的設計思想和原理進行了詳細論述和分析。 -
The fourth chapter : in this chapter, it introduces the hardware designing of the dsp system based on pci bus and states every module of the hardware designing : circuit of signal adjusting, filter circuit of anti - overlap, circuit of data - acquisition automatically, expanding circuit of dsp memory, circuit of voltage matching, interfaces circuit of pci etc. it also includes theoretic basis and procedure of pcb designing
第四章介紹基於pci總線的dsp系統硬體設計。敘述了硬體設計的各個模塊：信號調理電路、抗混疊濾波電路、自動數據採集電路、 dsp存儲器擴展電路、電平匹配電路、 pci介面電路等，以及pcb設計的理論基礎和設計過程，並給出了設計和調試的結果。 -
Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method
在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。 -
Tms320vc5402 is a fixed - point digital signal processor, made by texas instruments incorporated, which is 16 - bit word length. vc5402 has enhanced harvard architecture built around one program bus, three data buses, and four address buses for increased performance and versatility
另外，採用mcs - 51系列cpu作為採集處理卡板載mcu也存在一些比較嚴重的問題，如cpu的指令執行速度慢，總線帶寬窄等缺點，不能完成數據的高速處理。 -
Supports external wait signal to expend the bus cycle
支持外部等待時鐘信號延長總線周期。 -
Study of single bus priority signal planning under the mixed traffic flow
混合交通條件下單點公交優先信號配時研究 -
The features of pci local bus, signal definition, command definition, bus operation and the addendum of the pci local bus specification, revision2. 3 are introduced briefly at first. then the structure and function of plx pci 9656 pci bus mastering i / o accelerator are summarized including : pci 9656 ' s three data transfer modes ( direct master, direct slave, and dma ) and direct connection to three processor local bus types ( m mode, c mode. j mode )
在簡要介紹了pci總線的特點、 pci總線的信號、命令和操作規范、 pci總線的配置空間以及有關最新pci總線規范pci2 . 3里的一些新增和修改的內容之後，本文概述了plx公司的pci總線專用控制器pci9656結構和功能，並介紹了pci9656的發起者、從設備、 dma三種工作模式以及m 、 c 、 j三種局部總線介面方式。
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