bus-in signal 中文意思是什麼

bus-in signal 解釋
總線輸入信號
  • bus : n (pl busses buses)1 公共馬車;公共汽車;客機。2 〈口語〉汽車,機器腳踏車;飛機。3 【電學】信息...
  • in : adv 1 朝里,向內,在內。 A coat with a furry side in有皮裡子的外衣。 Come in please 請進來。 The ...
  • signal : n 1 信號,暗號;信號器。2 動機,導火線 (for)。3 預兆,徵象。adj 1 暗號的,作信號用的。2 顯著的...
  1. It measures fluid pressure in the industry process and converts it into 420 ma dc signal output ; at the same time, by field bus hart protocol

    它測量工業過程流體壓力,將其轉化成4ma20ma dc信號輸出。
  2. The development of fieldbus technology made lonworks field bus outstanding in all kinds of fieldbus. this paper simply introduces some kinds of common using fieldbus and the important position and influence of lonworks fieldbus in all kinds of fieldbus, carefully describes the technology core of lonworks technology, puts great emphasis on the introduction of the development and design of public security node of intelligent district which adopts computer, communication and control technology, carefully designs the interfaces of hardware circuits. the public security node of intelligent adopts 8031 single chip as its main processor to complete the application program of user, which mainly collects, process and control all kinds of field signal, and neuron chip 3150 as its slave processor to communicate with other nodes on field network, which works under parrel slave a mode

    現場總線技術的發展使得lonworks技術脫穎而出,本文簡要介紹了常用的幾種現場總線的概況以及lonworks技術在現場總線技術中的地位和影響,對lonworks技術的技術核心:神經元晶元、 lontalk協議、 lonworks收發器、 lonbuilder及nodebuilder進行詳盡的描述;重點介紹了集先進的計算機技術、通信技術、控制技術為一體的智能小區安防節點的開發與研製,對節點硬體電路的各種介面進行了詳盡的設計。本文設計的智能小區安防節點採用單片機8031作為主處理器來完成用戶的應用程序,主要負責對各種現場信號進行採集、處理及控制,工作在并行從a方式下的神經元晶元mc3150作為從處理器,主要完成與現場網路上的各節點及中心控制室之間的通信工作。
  3. Study of auto - safety detection system in railway signal lamp based on can bus

    總線的鐵路信號燈自動安全監測系統研究
  4. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制;視頻數據幀存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號; d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用: i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  5. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影( dsa )成像系統的組成結構和數據流向進行了深入研究和分析,並對系統中的數據流向進行了完整的歸納和總結,給出了x線數字成像系統中的高速大容量數據通道的設計方案;在對sdram的控制方式做了深入探討后,給出了實現大容量多條sdram共同工作的解決方案,在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲;通過對pci總線介面的深入研究,優化後端狀態機設計和低層驅動程序開發,給出了完整的pci介面方案實現高速dma數據傳輸,完全可以滿足視頻傳輸要求;深入研究了基於大規模可編程器件的數字系統設計方法,針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點,提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案,從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  6. The characteristics and the design concepts of the transient electro - magnetic methods system design of predecessors will be analyzed detailedly in this thesis, on the foundation, the transient electromagnetic exploration system based on dsp ( digital signal processor ) and usb ( universal serial bus ) was designed, in which the transmitter and receiver have been integrated together for the sake of better operation for exploration

    在總結前人在系統設計的基礎上,成功設計和實現了一套基於dsp ( digitalsignalprocessor )和usb ( universalserialbus )技術的瞬變電磁探測系統,本論文就該系統的設計思想和原理進行了詳細論述和分析。
  7. The fourth chapter : in this chapter, it introduces the hardware designing of the dsp system based on pci bus and states every module of the hardware designing : circuit of signal adjusting, filter circuit of anti - overlap, circuit of data - acquisition automatically, expanding circuit of dsp memory, circuit of voltage matching, interfaces circuit of pci etc. it also includes theoretic basis and procedure of pcb designing

    第四章介紹基於pci總線的dsp系統硬體設計。敘述了硬體設計的各個模塊:信號調理電路、抗混疊濾波電路、自動數據採集電路、 dsp存儲器擴展電路、電平匹配電路、 pci介面電路等,以及pcb設計的理論基礎和設計過程,並給出了設計和調試的結果。
  8. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中,採用高速的dsp處理器,實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法,實現了大電流信號的驅動輸出;採用485總線技術,組建了裝置主機與多探測器之間的主從式通訊網路,實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路,採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術,實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元,設計了人機信息交互的介面;採用了模塊化的軟體設計方法,開發了裝置主機及探測器的軟體程序。
  9. In the following chapters, a 16 - channel experimental phased array ultrasonic testing system is thoroughly explained, including digital beam forming, low noise programmable amplification of received ultrasound signal, multi - channel hi - speed hi - precision data acquisition, hi - speed real - time processing of multi - channel ultrasound signal, and hi - speed data transfer based on pci bus. in addition, the frame of software system is built

    本文詳細闡述了作者所獨立研製的16通道相控陣超聲檢測實驗系統,包括數字化超聲發射/接收波束形成、超聲信號的低噪聲程式控制放大、多通道高速高精度數據採集、多通道超聲信號高速實時處理、基於pci總線的高速數據傳輸等全部電路模塊的結構及工作原理,並說明了所編寫的底層軟體系統的框架。
  10. With the use of new mcu p87c591, as the techiniques of serial communication and negative display of lcd, the dashboard has a very beautiful apearence and the system is simplified. not only the analogy signal and the pulse signal can be sampled into the instrument, but also the datum on the can - bus should be transferred into the system whit the connection to the in - vechile network. under the guindance of the idea of " informatic design ", the digital lcd dashboard system is developed, and the professional manufacturer of lcd display device is directed to develop and to design the special lcd module, by which the new lcd production is greatly optimized. all these intentions bing about a very well goal

    在研製數字液晶儀表過程中,應用了新型單片機p87c591 、串口驅動技術和負顯技術,使該數字液晶組合儀表結構簡單,視覺美觀,既可以通過模擬通道、數字通道測量車輛傳感器的信號,又具備接入車輛總線、從can總線上獲得相關數據的能力。在項目開發過程中,運用「信息化設計」的觀點開展液晶顯示模塊的開發和設計工作;並根據軟體工程的原則,優化了液晶模塊的電路設計,使該項產品的開發取得了好的效果。
  11. The whole part of the data acquisition is build in a computer as two data acquisition cards. they are front card and rear card. the front card composed of four modules. they are : coin circuit module, data flow controller module, sdram array module and system bus interface module. the rear card composed of four odules. they are : asynchronous serial port interface module, adc control odule, ecg signal process module and gate control data produce module

    數據採集模式實現部分的大部分工作是在前面板上完成的,後面板主要是一些外圍電路。前面板採集卡上從物理上來說主要有四塊電路:符合電路,數據流控制器電路, sdram陣列和系統總線介面電路組成。後面板採集卡從總體物理上主要有四塊電路組成: 485串列通信電路, adc控制電路,心電數據處理電路和門控信號產生電路。
  12. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求,課題期間研製了下位機系統硬體和軟體,開發了上位機監控軟體,其中所作的具體工作包括:測量原理的研究和在系統中的實現,在本次設計中用三種方法來進行水位測量,分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法;主控晶元的選擇,我們選用了高集成度的混合信號系統級晶元c8051f021 ;實現了信號的採集和處理,包括信號的轉換和在單片機內的運算;高集成度16位模數轉換晶元ad7705在系統中的應用,我們完成了它與單片機的介面設計及程序編制任務;精確時鐘晶元ds1302在系統中的應用,在此,我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬,該晶元的應用給整臺儀器提供了時間基準,方便了儀器的使用;另外,針對研製任務的要求,還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測,該部分的實現是通過採用ad421晶元來完成的,本設計中完成了ad421與單片機的spi介面任務,協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系,並完成了程序設計;與上位機的通信介面設計,該部分通過兩種方法實現: rs232通信方式和rs485通信方式;系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  13. The digitizer based on pxi bus uses fpga ( field programmable gate array ) to implement 256 points, radix - 2 dit fft ( fast fourier transform algorithm ). the design uses pipelining for fft processing and can accomplish sampling and processing signals of two channels at the same time. in the signal acquisition circuit, - a / d convector is used to enhance the precision of the signal sampling

    在本設計中,採用fpga ( fieldprogrammablegatearray )實現了256點基2dit演算法復數fft ( fastfouriertransformalgorithm快速傅氏變換演算法)處理器,具有較高的速度和運算精度fft ,設計採用流水線處理方式大大的提高了處理速度,可實現對兩個通道輸入信號的并行採集與處理。
  14. Aim at the dtc ' s blemish mentioned above and the direction of dtc technique development, the dissertation put great emphasis on the work as follows, with an eye to exalt dtc system function : ( 1 ) a new speed - flux observer of an induction motor is proposed to enhance the accuracy of flux observing, which is an adaptive closed - loop flux observer and different from the traditions. a new adaptive speed - observation - way is deduced out according to the popov ' s stability theories ; ( 2 ) to improve the performance of dtc at low speed operation, we have to exalt the accuracy of the stator flux estimation and a new way of bp neural network based on extended pidbp algorithm is given to estimate and tune the stator resistance of an induction motor to increase the accuracy of the stator flux estimation ; ( 3 ) digital signal processor is adopted to realize digital control. an device of direct torque control system is designed for experiment using tms320lf2407 chip produced by ti company ; ( 4 ) bring up a distributed direct torque control system based on sercos bus, sercos stand for serial real time communication system agreement which is most in keeping with synchronous with moderate motor control ; ( 5 ) the basic design frame of the hardware and software of the whole control system is given here and some concrete problem in the experiments is described here in detail

    針對上面提到的直接轉矩控制的缺陷和未來直接轉矩控制技術發展方向,本論文重點做了以下幾個方面的工作,目的在於提高dtc系統的綜合性能: ( 1 )提出一種新型的速度磁鏈觀測器,新型的速度磁鏈觀測器採用自適應閉環磁鏈觀測器代替傳統的積分器從而提高磁鏈觀測的精度,並且根據popov超穩定性理論推導出轉速的新型自適應收斂律; ( 2 )改善系統的低速運行性能,主要從提高低速時對定子磁鏈的估計精度入手,提出了一種提高定子磁鏈觀測精度的新思路? ?利用基於bp網路增廣pidbp學習演算法來實時在線地修正定子電阻參數; ( 3 )採用數字信號處理器dsp實現系統全數字化硬體控制,結合ti公司生產的tms320lf2407晶元,設計了直接轉矩控制系統的實驗裝置; ( 4 )提出了基於sercos總線網路化分散式的直接轉矩控制系統, sercos ( serialrealtimecommunicationsystem )是目前最適合同步和協調控制的串列實時通信協議; ( 5 )基本勾勒出整個控制系統的硬體和軟體設計基本框架,詳細描述一些實驗中的具體的細節問題。
  15. Pci bus as a high performance and low price bus is used to design the digital signal process system in this project

    Pci總線作為一種高速總線在課題中被用來設計高性能價格比的數字信號處理系統。
  16. In the thesis, based on design and implementation of the two signal processing system of different requirement, multi - dsp processor structure, dsp - pci interface, system control logic, pci device driver program, user application program are researched. the main content is list as follows : 1 ) according to the lfmcw radar signal processing algorithm, a signal processing system based on pc104 - plus bus is developed

    本文通過對以上兩種雷達信號處理機的設計開發過程,研究了採用多片dsp信號處理器組建并行處理模塊實現信號處理演算法的方法,利用pci總線實現處理機數據傳輸介面,設備驅動程序和控制界面軟體開發,實現信號處理機數據傳輸控制等幾個方面的內容,主要工作如下: 1 )針對線性調頻連續波雷達信號處理演算法,完成了基於pc104 - plus總線的嵌入式信號處理板的設計、製作以及調試。
  17. In this paper, ieee1149. 4 std mixed - signal test bus and its characteristic are studied. according to the structure defined in this standard, test methods of mixed - signal circuits are studied. the mixed - signal boundary - scan test system, which is complianted to ieee1149. 4 std, is designed

    本文深入研究了ieee1149 . 4混合信號測試總線及其特點,並根據邊界掃描標準定義的測試結構對混合信號電路的測試方法進行研究,設計出符合ieee1149 . 4標準的混合信號邊界掃描測試系統。
  18. In this chapter the paper also introduce the method of adjusting white balance of digital tv, put forward the framework of lcd white balance measurement & adjusting system. the third chapter introduces signal generator, cm - 7l color analyzer, and i2c bus interface

    第三章分別介紹了液晶電視機白平衡調整系統中硬體的三個主要構成部分白場信號發生器, cm - 7l彩色分析儀,總線介面板。
  19. If the message is a bus disconnect signal, the event loop is terminated, as there is no point in listening to a non - existent bus

    如果消息是總線斷開信號,則事件循環終止,因為偵聽一個不存在的總線是沒有意義的。
  20. It introduces that high - frequency data acquisition method bases on the common gpib bus. to data acquisition based on pc - daq, it makes theoretical analysis in signal - processing grounded signal source and measurement, data acquisition principle. avoiding pseudo - signal and multi data acquisition etc. .

    一個完整的基於gpib總線介面系統主要由帶gpib介面的測試設備、 gpib卡以及電纜和計算機組成。在本章中介紹了基於gpib介面總線的特點,著重說明了gpib總線介面系統的原理和方法並給出了源代碼。
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