cache hit 中文意思是什麼

cache hit 解釋
超速緩存命中次數
  • cache : n. 1. （探險者等貯藏糧食、器材等的）暗窖，密藏處。2. 貯藏物。3. 【計算機】高速緩沖內存。vt. 1. 貯藏；密藏；窖藏。2. 【計算機】把…儲存到硬盤上。
  • hit : vt （hit; hitting）1 （箭、子彈等）打，打擊，命中 （opp Miss）。2 碰撞，使碰撞。3 偶然碰見，遇見...
  1. Smpdca architecture has six outstanding excellences : complexity of the control logics of smpdca is lower than large scale superscalar ; supplying shortest inter - processor communication latency using the shared li data cache ; no cost to maintain cache coherence ; hit rate of data cache increase ; easy to reuse many softwares of symmetric multiprocessor ( smp ) ; exploit the parallelism of applications from many levels. this paper present the architecture model of smpdca, and illustrated its function units, and discussed its key techniques, and analyzed the address image policy of multi - ported cache

    Smpdca結構具有六個突出優勢：相對于大規模的超標量結構而言， smpdca結構的控制邏輯復雜性明顯要低得多；相對于通過共享主存來實現處理器之間的通信的結構而言，通過一個共享的第一級數據cache來實現處理器之間的通信的smpdca結構能夠提供非常小的處理器之間的通信延遲；沒有cache一致性維護開銷；數據cache命中率提高；便於smp （對稱多處理器結構）的軟體重用；從多個層次上開發程序的并行性。
  2. Disables the keeping of cpu time and cache - hit ratio statistics

    不保留cpu時間和高速緩存命中率統計信息。
  3. Reorders faces to increase the cache hit rate of vertex caches

    對面重新排序，以增加頂點高速緩存的高速緩存命中率。
  4. For certain workloads cache hit ratio is lower than would justify having it enabled

    在一定的負載壓力下，如果緩存命中率太低了，就啟用它。
  5. Lower bounded indicators are identified as unhealthy as they decrease in value for example, the cache hit ratio indicator

    當設有下界的指示器（例如，緩存命中率指示器）的值降低時，它將標識為不健康。
  6. If data is requested and is in the cache ( a phenomenon called a cache hit ), the data is retrieved from the cache, avoiding having to retrieve it from memory or disk

    如果數據被請求，並且數據在高速緩存區（這種情況就是高速緩存區命中） ，就直接從高速緩存區讀取，而不需要從內存或者磁盤讀取。
  7. An external cache hit can cost 2040 clock cycles

    外部緩存命中可以花費2040個時鐘周期。
  8. A cpu cache hit can cost your program 1020 clock cycles

    Cpu緩存命中可以花費程序1020個時鐘周期。
  9. We test the experimentation system by fixed - quanity emu1ation with standard data, and the performance ana1ysis indicates that when the size of circulatory prograxn seginent is smaller than the cache size, the cache hit rate is higher than 90 %, while bigger than the cache size, the hit rate is between 48 % and 74 %

    本文詳細論述了定義cache工作的類mesi協議，針對實驗儀的結構，給出了cache的設計原理圖和電路圖。用典型數據定量模擬測試，分析性能，結果證明，循環的程序段容量小於cache時， cache命中率高於90 ；大於cache時， cache命中率在48 - 74之間。
  10. Another good idea is to forewarn all participating parties of your moving by putting up a " we are moving " note on your existing home page with moving dates and a reminder note to hit " reload " to refresh their cache to see the new page on the new server

    考慮到上述這些因素，一般要一個星期時間使您的轉移了地址的網站可以回復工作。另外一個好辦法是預先通知有關的方面，告訴他們您的域名地址轉移了。您可以在您現在的主頁上作一個通知
  11. This algorithm can improve hit rate on backend servers " main memory cache, thus increase the performance of the whole cluster system

    該演算法可提高後端服務器的主存cache命中率，從而提高了整個集群系統的性能。
  12. Package and catalog caches, and workspaces for example, package cache hit ratio

    包與目錄緩存，以及工作空間（如包高速緩沖區命中率） 。
  13. Cache api hit ratio the cache hit - to - miss ratio when accessed through the external cache apis

    當通過外部緩存api訪問時，緩存命中數與未命中數的比率。
  14. Additionally, more rows fit in the storage engine cache, potentially improving the hit ratio

    此外，存儲引擎緩存中也可以包含更多的行，而這可能會提高命中率。
  15. For clients with weak enforcement of deviation, a cache coherency policy based on period _ of _ validity is presented. query cache hit is decided by c

    查詢在客戶語義緩存中的命中判斷包括對緩存項與查詢描述之間匹配與可導出的判斷。
  16. And described three ways in detail separately : more access ports and non - blocking cache and quick hit buffer ( qhb ), and analyzed their performance. smpdca is a promising processor architecture

    並分別對更多的訪問埠、非阻塞cache以及快速命中緩沖區（ qhb ）等三種方法進行了詳細描述和性能模擬分析。
  17. And then, it gives some useful approaches of program transformation to reduce cache conflicts, and concludes three accessing modes in multi - media applications to prepare for the further study of stream cache prefetching technologies. this paper also introduces a data allocation approach to scratch - pad sram, with the purpose of improving cache hit rate

    討論了常用的提高數據時空局部性的程序變換方法以降低cache失效率，並針對多媒體領域應用程序的特點，總結了三種多媒體常見存儲訪問模式，為進一步研究並向dpc存儲系統加入流cache的預取技術奠定了基礎。
  18. Caching a complete portal page markup by using adaptive page caching yields the best performance improvements per cache hit, but a cache hit occurs only if the requested page is identical to the cached response

    將門戶頁標記全部緩存，可以在每次緩存命中的情況下獲得最佳性能提高，但只有在請求的頁面與緩存的響應完全相同的情況下才會出現緩存命中。
  19. Cache memory " hit

    快取記憶器
  20. This paper made performance simulations of spmdca in detail using rsim simulator. this paper present and analyzed four kinds of simulation results : hit rate of data cache, and cost of communications, and affections to the performance due to the long latency of shared data cache, and execution time of applications

    本文利用模擬器rsim對smpdca結構進行了詳細的性能模擬分析，從數據cache命中率、通信開銷、共享數據cache的訪問延遲對性能的影響以及程序執行時間四個方面給出了模擬結果，並對模擬結果進行了分析。
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