chip bit 中文意思是什麼
chip bit
解釋
碎片金剛石鉆頭-
This dissertation is supported by the following projects : the project of " the development and commercial usage of embedded 32 - bit mcu " from mii and the project of " the development of security chip based on pci ip " from the institute of vlsi design, hefei university of technology
本文基於國家信息產業部項目「嵌入式32位微處理器開發及產業化」 （項目編號：信運部[ 2001 ] 900號）和合肥工業大學微電子設計研究所承接的設計服務項目「 pci介面信息安全晶元開發」 。 -
On the contrary, that stab in the back touch was quite in keeping with those italianos, though candidly he was none the less free to admit those ice creamers and friers in the fish way, not to mention the chip potato variety and so forth, over in little italy there, near the coombe, were sober thrifty hardworking fellows except perhaps a bit too given to pothunting the harmless necessary animal of the feline persuasion of others at night so as to have a good old succulent tuck in with garlic de rigueur off him or her next day on the quiet and, he added, on the cheap
不過，他仍然願意坦率地承認，庫姆街附近的小義大利128那些賣各種炸土豆片的自不用說，還有賣冰淇淋的和賣炸魚的，也都不喝酒，是些勤勤懇懇省吃儉用的人們。不過，他們也許太喜歡趁著夜間隨手亂逮屬于旁人的有益無害的貓129族了。還把他或者她那不可或缺的130大蒜抄了來，好在第二天人不知鬼不曉地飽餐一頓帶汁的佳肴，並且還說： 「來得真便宜。 」 -
Design of a multiplier in an 8 - bit risc single - chip microcomputer
結構單片機乘法器 -
The nonlinear filtering for nbi estimate - subtract assumes that the prediction error is dominated by spread spectrum signal and the background noise power is far below spread spectrum chip power, this assumption promises the low error ratio of chip decision but may not be attainable to digitalized dsss receiver in military communication environment, and does not coincide with the principle of dsss communication that decreases bit error ratio ( ber ) depending on spread spectrum gain, not on chip power
在干擾估計抵消濾波中，以往的非線性濾波要求干擾抵消濾波后擴頻信號功率遠大於殘余噪聲功率，進而假設碼片判決的誤碼片率基本為零，這一要求對軍用擴頻通信是不利的，而且也不符合擴頻通信利用擴頻增益降低誤碼率的原則。 -
This thesis researched the time synchronization method for 2d - ss system, and deeply discussed the bit error rate ( ber ) performance of multicarrier domain spread spectrum chip - level differential detection ( mc - ss - cldd ) in the presence of multi - user interference
本論文從多載波擴頻通信系統出發，提出了廣義二維擴頻系統的同步演算法，並對多載波頻域擴頻碼片級差分檢測技術在多用戶情況下的系統性能進行了深入的研究。 -
The 32 - bit cpu core with enhanced multiply accumulate emac unit provides optimum performance and code density for the combination of control code and signal processing required for mp3 decode, file management, and system control. fs2401clqn is a single - chip mp3 audio decoder
當用戶端的pc與存儲媒介之間透過usb 2 . 0介面做資料交換時，因僅需要cpu最低程度的參與，而大多是以硬體處理方式，所以可以達到高速傳輸的目的。 -
An algorithm based on the inner structural feature of the 8 - bit single chip microprocessor is presented to perform the space vector modulation, it is high efficiency in voltage - utilizing, low harmonic losses, fast in calculation speed, simple in over - modulation method, high ratio of capability to price
介紹一種用8位專用單片機內部結構特徵而設計的空間矢量調制演算法，不但具有電壓利用率高、諧波損耗小等優點，還具有計算速度快、過調制處理方法簡潔、性能價格比高等優點。 -
It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ), 5 - stage pipeline, hardware multiplier and divider, interrupt controller, 16 - bit i / o port and a flexible memory controller. new modules can easily be added using the on - chip amba ahb / apb buses. it has flexible peripheral interfaces, so can be used as an independent processor in the board - level application or as a core in the asic design
它遵照ieee - 1745 （ sparcv8 ）的結構，針對嵌入式應用具有以下特點：採用分離的指令和數據cache （哈佛結構） ，五級流水，硬體乘法器和除法器，中斷控制器， 16位的i / o埠和靈活的內存控制器，具有較強的異常處理功能，新模塊可以輕松的通過片上的ambaahb / apb總線添加。 -
Count that judge key assignments and interrupt accomplish the function of keyboard. two chip of saa1064 with i2c interface compose 8 bit led display subsystem. thus the configuration are simplified. at24c01 is selected for the data memory chip
而鍵盤採用了計數判斷鍵值和中斷的相結合方式；同時八位led顯示子系統採用基於i ~ 2c總線的saa1064晶元構成的顯示子系統，簡化了系統的結構。 -
According to the principle of spread spectrum communication, the anti - interference performance of the technology is discussed and the composition of power line spread spectrum communication is described. based on the spread spectrum technique, a method which is low cost, high communications quality and low bit error for power line carrier communication using single - chip software programming is proposed
利用擴頻通信原理，分析擴頻通信的抗干擾特性，在此基礎上，闡述了電力線載波通信系統的基本結構，提出了一種利用軟體編程實現電力線載波擴頻通信的方法。該方法不增加硬體成本，即能達到提高通信質量、降低誤碼率的目的。 -
The ina128 is used by left leg ' s driver circle and the aims are to enhance the cmrr and reduce the disturbance of 50hz. the part of a / d transmitting chip is the adc0809 which have a eight - channel transmitter, a eight - bit a / d transmitter and the logical control by microprocessor
考慮到家庭監護的實際應用，精度的要求不是很高， a / d轉換器採用的是adc0809 ，它有8通道多路轉換器、 8位模/數轉換器和與微處理器兼容的控制邏輯電路。 -
The current models have phased out the g3 but continue to use the similar g4, both 32 - bit chips, running at various clock speeds ; the recently introduced g5 is a 64 - bit ibm chip that mostly adds some multimedia - specialized instructions to the power4 chip models
當前的g3型已經逐步被淘汰，取而代之的是類似的g4型，它們都是32位晶元，運行於不同的時鐘脈沖速度下；最近推出的g5是一款64位ibm晶元，主要是向power4型晶元中添加了一些多媒體專用指令。 -
Very simple is foul smell child face, with a bit carrot, tomato patch, bean curd, all cut man ( chip also goes ), the best day lily that increase a point ( also call day lily ), next boiler are fried a little, add water to be boiled slightly to carrot, potato a bit soft, put the agaric that has cut, spinach, still had better have the meat stuffing that has fried, salt is put after be being thoroughlied cook entirely, tick off gorgon euryale, involve fire
很簡單的是臊子面，用一點胡蘿卜，土豆，豆腐，均切丁（薄片也行） ，最好加點黃花菜（也叫金針菜） ，下鍋稍微炒一下，加水略煮至胡蘿卜、土豆稍軟，放入切好的木耳、菠菜，最好還有炒好的肉餡，全部煮熟後放鹽，勾芡，關火。 -
As dispatches from foreign news agencies report, toshiba now development has made a kind of every unit may stock the multilayer level chip design of two bit informations, and before it is this, every unit can only have a bit information
據外電報道，東芝日前開發出了一種每個單元可存儲兩個比特信息的多層級晶元設計，而在此之前每個單元只能存在一個比特信息。 -
Features include full 10 - bit data processing, high - quality, motion - adaptive deinterlacing up to hdtv 1080i with enhanced low - angle processing, frame - rate conversion, picture - in - picture ( pip ), picture - off - picture ( pop ), high - quality scaling for multi - windows. in addition, the chip offers programmable pixelboost
其主要的功能包括了全10位的數字處理，高品質，採用增強的小角度處理技術和運動自適應技術的高清1080i逐行處理，幀頻轉換，畫中畫，畫外畫，高性能的多窗口縮放。 -
Forget the detractors, david mosberger - developer of the initial gcc port to ia - 64 and lead kernel architect for linux on ia - 64 - thinks you should care about intel s new 64 - bit chip
別去管貶低者， david mosberger最初將gcc移植到ia - 64的開發人員以及ia - 64上的linux首席內核架構設計師認為您應關注intel的新64位晶元。 -
Each channel has independent synchronization and two powerful digital signal processing chips. one chip performs all the synchronization and sampling computations, while the other does the fast fourier transform of current and voltage signals sampled with 18 bit resolution. both current and voltage have separate but fully synchronized a d waveform capture sections
就信號分析能力而言， 2503ah系列的最大特點是速度和精度，各通道均獨立同步及擁有兩片數字信號處理器晶元，當一晶元執行全部同步與取樣運算時，另一晶元則為已取樣的電流與電壓信號以真實18位解析度進行速傳立葉變換，電流與電壓具分離但完全同步的a d波形捕捉部份 -
Based on the basic requirements and function of the displacement - load sensor, the design adopts single - chip 8 - bit microcontroller - p89c51rc2 manufactured in an advanced cmos process and belonged to the 80c51 microcontroller family to make the p89c51rc2 ’ s circuit less, simple and more reliable
根據位移-載荷傳感器功能和主要技術指標要求，採用高性能靜態80c51設計的，帶有非易失性flash的8位微處理器p89c51rc2作為傳感器的核心控制器。 -
The input votage range is 20mv 10v, frequency range is 0 ~ 20khz. the ad sampling rate is 100ksps, distinguishability is 16 bit. it uses two groups of ram to real - time store the collected data by time - sharing store and access technique, and uses a dsp chip to real - time analyse the frequency spectrum
信號輸入電壓范圍20mv 10v （七檔量程可選） ，輸入頻率范圍0 ~ 20khz ， ad采樣率100ksps ，解析度16bit ，採用兩組ram存儲器分時存取的方法實時存儲採集數據，使用dsp晶元進行實時頻譜分析，通過pci總線與主機進行數據交換。 -
H. 323 is the standard about multimedia communication released by itu - t. tm1300 including a very powerful, general - purpose vliw processor core ( the dspcpu ) that coordinates all on - chip activities is a media processor for high - performance multimedia applications that deal with high - quality video and audio. the dspcpu implements a 32 - bit linear address space and 128, fully general - purpose 32 - bit registers
H . 323是itu ? t推出的用於ip分組網路的多媒體通信終端協議， trimediatm1300處理器晶元是philips公司推出的一種基於多媒體應用的具有vliw指令，含有128個通用寄存器， 32位的高性能處理器，它能夠通過編程實現通信協議，完成高質量的音頻、視頻處理和網路介面。
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