circuit error 中文意思是什麼

circuit error 解釋
環線閉合差
  • circuit : n 1 (某一范圍的)周邊一圈;巡迴,周遊;巡迴路線[區域];迂路。2 巡迴審判(區);巡迴律師會。3 【...
  • error : n. 1. 錯誤;失錯。2. 謬見,誤想;誤信;誤解。3. 罪過。4. 【數學】誤差;【法律】誤審,違法;(棒球中的)錯打。adj. -less 無錯誤的,正確的。
  1. By changing of the difference of write address and read address, a delayed signal from read port is achieved. the two methods have different idea but reach the same goal and have the properties that are pure digital delay, little error, compendious circuit and maneuverability

    兩種方法異曲同工,為純數字延遲,具有抗干擾性強、誤差小、電路簡明,可操作性強等優點,既體現了設計的多樣性,又體現了fpga設計的靈活可編程特性。
  2. Error diffusion circuit in color - pdp

    中的誤差擴散電路
  3. It designed signal amplifying circuit, frequency tricking circuit, data sampling and keeping circuit. the choice of 12 bits high accuracy a / d integrated data sampling card made program simply, high flexible and expandable. and to each error which is likely to occur in high voltage capacity type equipment during the monitoring, analysis and judgement are given

    在硬體電路實現上,注意選擇信號傳感器;合理設計了信號放大電路和濾波電路;設計了頻率跟蹤電路,數據采樣/保持電路;結合軟體控制選用了12位高精度的a / d轉換器,使軟體編程簡化且具有較高的靈和性和可擴展性。
  4. The capacitance offset averaging network is used in the distributed track - and - hold circuit block of the designed system. finally, according to the analysis on error effects in adc, the mathematics error model is simulated. furthermore, the input - output characteristics including input -

    最後,基於對a / d轉換器系統中誤差的分析,對其誤差數學模型進行了模擬,得到了包含延遲、限幅、諧波失真等誤差的輸入輸出特性曲線。
  5. This problem arises from the circuit layout of vlsi designs, interconnection networks, sparse matrix computations, error - correcting code designs, data structures, biology, etc, which has extensive backgrounds

    圖的嵌入問題是從稀疏矩陣的計算、數據結構、 vlsi電子線路設計和分子生物學等問題中提取出來的數學模型,有著廣泛的應用背景。
  6. We discuss the formation of the unidirectional links and their influence on the manet routing protocols such as dsr, dsdv, aodv. solutions are given to overcom e the problems, we analyze some of they and point out their limitations. in the third part, we show a new on - demand routing strategy supported unidirectional links, it use the two circuits route search algorithms to establish the route from the source node to the destination and backward with directions ; it transfer the route error messages from the backward positions to the forward positions one by one ; it apply the packet encapsulation technique to forward the packets through the unidirectional links and introduced the circuit path to transmit information from the forward node to the backward node

    接著,指出在移動自組網環境中,單向鏈路的普遍存在,分析了它的產生原因、它對目前協議棧的影響;然後,我們給出了一種按需路由的自組網單向鏈路路由演算法,它只有在需要路徑的時候才維護路由,使用二循環路由尋徑演算法以建立節點間的路徑,使用逐跳逆向傳遞的方式報告路由終斷,使用封裝廣播的方式沿單向鏈路正向傳輸,使用報文封裝方式支持單向鏈路下游節點向上游節點傳遞信息。
  7. Accurate simulation of switch circuit is needed in pin switch design, while limited by assembling techniques, serial resonance and channel inter - coupling exist in the common joint that bring a lot of difficulties for simulation. 2 - dementions simulation software can not establish accurate circuit mode for pin diode switch which gives simulation error, and it costs much more time with 3 - dementation simulation software, which is not applicable in practice for pin switch design

    Pin開關的設計中需要對開關電路進行準確模擬,然而高頻、寬帶、多擲pin開關受裝配工藝的限制,開關公共結點附近存在著串聯諧振和相互耦合,給pin開關的準確模擬帶來了困難:二維模擬軟體很難對電路進行準確建模,模擬誤差較大;三維模擬軟體耗時過長,難以在實際設計中應用。
  8. Above all, [ 12 : 8 ] harming error correction theory is mentioned in this paper. the edac circuit designed by vhdl can works normally at different frequency of the cpu clock such as 66mhz 50mhz 40mhz 33mhz. the edac function of the circuit can also be disabled by software tool. meanwhile, some basic devices such as and logic, or logic, not logic and some small scale integrated circuits are also integrated in the fpga

    本論文闡述了12 , 8漢明碼糾錯設計過程,採用vhdl語言實現糾錯編碼器( edac ) ,本設計能夠適應cpu時鐘信號clk2的不同頻率,如66mhz 、 50mhz 、 40mhz 、 33mhz ,並且能夠通過軟體的控制使fpga的糾錯編碼功能關閉。
  9. A method about how to design a real - time edac circuit based on aerospace computer which cantains 386ex cpuis is described in this paper. the main subject of this paper concentrates on the design of the edac ( error dectection and correction ) circuit which can accomplish the function that correct the errors of the data in sram

    本課題實現了基於386excpu航天計算機的實時edac ( errordetectionandcorrection )電路的設計,即採用糾錯編碼設計來完成對sram中的數據進行糾錯的功能。本課題的研究工作建立在第一輪386excpu航天計算機最小系統設計成功的基礎之上。
  10. A kind of gain error correction scheme for sample - and - hold circuit

    保持電路中的一種增益誤差自校正方法
  11. The sample and hold circuit is employed by the bottom plate sampling technique, which could not only cancel the charge injection error but also eliminate the effect of clock feed - through

    采樣保持電路設計採用了電容下極板采樣技術,不僅有效地避免了電荷注入效應引起的采樣信號失真,而且消除了時鐘饋通效應的不良影響。
  12. To avoid the serious electromagnetic interferer, the analog signals are transformed to frequency pulses which are transferred to the kernel of the system. in the measure of the groove voltage, the method of float - ground is adopted to avoid the high common signal and the range switch circuit is designed to solve the conflict of the wide dynamic range and the high precision. least square curvefit is adopted to reduce the system error

    鋁電解生產現場電磁干擾非常嚴重,為此我們將需要測量的模擬信號就近轉換為頻率脈沖后再傳送到控制核心;採用浮地接入方式消除槽電壓信號中的共模成分;設計了量程自動切換電路以解決槽電壓的動態范圍寬和測量精度高的矛盾;用最小二乘法進行曲線擬和以降低測量的系統誤差。
  13. In order to make the sensitivity of 2 - demension accelerometer along the two main arbors almost identical, symmetric four - beam structure that embeds a double - sides interdigitated differential capacitive with puckered beam in two directions was used as sensitive component. in addition, the differential capacitive accelerometer fabricated by bulky silicon micromechanical technique has high sensitivity, wide measurement scope, less nonlinear error, and simple converting circuit. then, the structure parameters of the sensitive component were calculated and stimulated, which results in a set of the optimized structure design parameters, main fabrication procedure and several key fabrication technology

    為使二維振動傳感器在兩主軸方向的靈敏度大致相同,敏感元件採用高度對稱的四梁結構,其中每個軸向上均採用帶折疊梁的雙側叉指電容結構,採用體硅微機械工藝製作的高深寬比叉指電容式敏感元件,具有高靈敏度、寬量程、非線性誤差小、外圍電路簡單等優點;對設計的敏感元件結構參數進行了計算,並利用有限元法進行了模擬分析,根據模擬結果得出了優化參數;在確定敏感結構的基礎上,研究了敏感元件採用體硅微機械加工工藝製作的工藝流程和關鍵工藝技術;對敏感晶元內部的c - v介面電路進行了原理設計與分析,利用差動測量技術得到由振動引起的微小電容變化量,經c - v介面電路進行相位調制處理,然後通過解調輸出與加速度成正比的電壓信號。
  14. 3. with comprehensive improvement of transponder including structural adjustment to lna ; optimization of ( phase locked loop ) pll filter ; structural adjustment to the transmitter and phase error adjustment to the intermediate frequency demodulation circuit, we have successfully enhanced sensitivity, expanded dynamic range, increased transmitting power and improved the spectrum purity ; decreased capture time for pll ; improved the signal quality after demodulation ; reduced its volume and power consumption. 4

    3 、對通信機的全面改進,包括lna結構的調整、鎖相環環路濾波器的優化、發射部分結構的調整以及中頻解調電路的相差調整,提高了系統的接收靈敏度、改善了本振的頻譜純度、減少了鎖相環的鎖定時間、使中頻解調后的信號質量大為提高,同時還減少了體積、節約了系統的功耗。
  15. The precise clock source is crystal oscillator made of 74hc04 ; the mute circuit can conceal the error and solve the problem of noise ; the antenna switching circuit in the receiver is to select one antenna from two which receives signal better. it can improve the quality of the receiving audio signal, restrain the noise effectively and promote the system performance

    高精度的時鐘源是由74hc04構成的晶體振蕩器;靜音電路將出錯的音頻信號進行差錯掩蓋,很好地解決了噪聲問題;接收機採用兩副天線切換工作,提高了音頻信號接收質量,有效地抑制干擾,提升了系統的性能。
  16. For the existing transformer cooling control system has many shortcomings such as the complicated system control circuit, the low reliability, the protection methods of blower fan being so simple, large control error, high fault rate, massive maintenance work and no method to realize telecommunication, this thesis develops a novel intelligent power transformer air - cooled control system based on the center of microprocessor through all - round technology analysis and research

    本文針對變壓器冷卻系統使用常規控制系統存在的系統控制迴路復雜、可靠性低、風機的保護方式簡單而無法進行故障預測、主變壓器油溫測量精度低造成控制誤差大、故障率高、維護工作量大、無法實現遠程通訊等問題,經過多方面的技術分析和調研,設計開發了新型的以微處理器為核心的智能式電力變壓器風冷卻器控制系統。
  17. In order to eliminate the influences caused by temperature, electrode - polarization and autoeciousness - capacitance, the traditional instrument has added complicated circuits so that it cause such shortcomings as big error, time - retardation and a relatively small scope. through the problems caused by 2 - probe electrode and ac current source, a new measuring circuit based on the excitation of bi - directional voltage pulse and the sensor of 4 - probe electrode is proposed, using single - chip to achieve auto - temperature compensation

    作者在參閱國內外大量相關參考文獻的基礎上,從電導測試技術的原理性研究出發,分析了採用交流激勵源、兩電導電極為傳感器的傳統電導測試系統所面臨的種種問題,提出並研製了一種基於雙極性脈沖電壓激勵、以四電導電極為探頭、運用單片機進行溫度自動補償的新型電導率測量系統。
  18. In the second chapter, we firstly present a circuit of 8 - bit, 80mhz samples / s thermometer - decoded dac with hierarchical symmetrical switching sequences which will compensate gradient error, on the basis of 8 - bit dac, we then present high frequency, high definition 12 - bit, 80mhz samples / s current - steering dac

    第二章:提出了具有梯度誤差補償的高速8位、 80mhz溫度計碼數模轉換器,並在此基礎上進一步提出了高速、高精度12位、 80mhz采樣率電流舵結構數模轉換器。
  19. Analyze item by item the position of unintact cycle, the running clearance of unintact cycle, locking - deform, datum dimension regulating, repeatly install, power voltage wave and marking running etc. at the same time, we give the calculating formula to calculating the running marking random error, and use it to calculate the system error of big diameter measure instrument - - datum dimension frame error, gyro - wheel diameter error, error caused by circumstance temperature, error caused by backing distance, angle error, delay error of data collecting circuit, lathe main shaft running error, workpiece install partial error

    對不完整圓的位置、不完整圓的轉動間隙、鎖緊變形、基準尺調整、重復安裝、電源電壓波動、標記轉動等隨機誤差進行了逐項分析,並給出轉動標記隨機誤差的計算公式。對大直徑測量儀的系統誤差?基準尺尺架誤差、滾輪直徑誤差、環境溫度引起的誤差、後退距離引起的誤差、角度誤差、數據採集電路延時誤差、車床主軸回轉誤差、工件安裝偏心誤差分別進行了計算,最後對誤差進行合成。
  20. In the meantime, the all sub - circuits are also designed and emulated carefully including inverter, rs type flip - flop, voltage reference circuit, error amplifier, voltage comparator, sawtooth - wave generator, pwm comparator, soft activation circuit and so on. as a result, all of the sub - circuits answer the requirements. this chip has taped out with the 0. 5um mix - signal process of csmc

    本文利用cadenceeda集成電路設計工具、 spectres模擬工具,對集成電路內的各個模塊包括反相器、基本rs觸發器、基準電壓電路、誤差放大電路、電壓比較電路、鋸齒波振蕩發生電路、 pwm比較電路、軟啟動電路、驅動電路等進行了具體的設計和模擬,且達到了預先設定的指標。
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