circuit time 中文意思是什麼
circuit time
解釋
電路工妝間-
The new system consists of a single - chip computer system ( at89c51 + psd311 ) and alow power consumed analyzer by applying a new adc chip ads774, and a dead - time correcting circuit is designed to correct the collecting time
本系統由單片微機系統（ at89c51 + psd311 ）組成多道緩存，由低功耗模數轉換器組成分析器，與微型計算機通過列印并行介面實現數據通訊，並含有死時間校正電路。 -
As a new interface caters for rapid development of computer peripheral equipment, universal serial bus ( for short usb ) dispels astriction of communication through traditional serial port and parallel port. it is very suitable for real time image data transmission, which requires high speed. this theme describes two - circuit systems, which utilize usb interface to data from a digital image sensor to pc
為了迎合計算機上設的快速發展以及消除計算機外設通過串、並口的通訊的局限性，出現了新的計算機外設介面usb （通用串列總線） ，這種新型介面對于實時的視頻傳輸很適用，本文設計了兩套電腦眼基於ez - usb2131q的usb介面系統。 -
This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga
本課題主要針對星載并行計算機體系結構及軟體結構的特點，從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統級容錯模型研究，提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究，提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略，同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術，提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案，實現該方案所需增加的電路少，可避免板級晶元以及fpga晶元內部任何邏輯發生單點故障。 -
By the time hamilton rejoined the circuit there was insufficient time for him to complete his out - lap before the chequered flag fell
當漢密爾頓重新進入賽道，已經沒有足夠的時間讓他完成他的最後一圈。 -
The local network resoure management system is mainly engaged in the lacal network resoure management, at the same time and the network quality managerment as well, also including network line - pipe management, equipment management, configure management, topology management, attemper management and systimatic analysis, the main equipments include pdh, sdh, dwdn, idlc, pon, fwa, adsl, bits etc. by means of the main equipments " s resoure attemper and running state, we can finds out something abnornal in operation, from the whole point of local network, adjusting network is to be made to reach overal optimiztion. ensuring the network operating quality, realizing the the dispatching solution on the basis of network resource management and circuit closed - loop dispatching circulation
本地網網路資源管理系統是側重於本地網網路資源的管理，同時兼顧網路質量管理。重點網路管線管理、設備管理、配置管理、拓撲管理、調度管理以及統計分析，主要設備包括pdh 、 sdh 、 dwdn 、 idlc 、 pon 、 fwa 、 adsl 、 bits等。通過主要設備的資源配備和運行狀態，該系統發現處理運行異常，從本地網全局的角度調整網路達到整體優化，保證網路的運行質量，在網路資源管理的基礎上，實現調度方案的生成，以及電路通道的閉環調度流程。 -
According to the system technology require, adopting singlechip realize open loop digital control of hdclsm ; using v / f conversion and complex key - control method realize digital setting of system parameter, such as velocity ; using micro - stepping control insure the motor running more smoothly ; adopting debasing speed control method to eliminate the mechanical impact of distance termination effectively ; at the same time, analyzing main power circuits drive circuit and protect circuit of system, completing hardware design and facture and software programming and debugging ; at last, making a whole test in hybrid rotary step motor. the experiment result indicates that this control system reaches the qualities required and run smoothly also
根據系統技術要求，採用單片機實現了混合式直流直線步進電動機的開環數字控制；利用v f變換和復合鍵控方法實現了系統轉速等參數的數字設定；利用細分控制技術保證了電機運行的平穩性，並進行了波形分析和理論研究；採用單片機軟體降速控制策略解決直線步進電機行程末端的機械沖擊問題；同時對主功率電路、驅動電路和系統保護電路進行了分析，完成了硬體設計、製作和軟體編程、調試，最後在混合式旋轉步進電動機上進行了全面測試。 -
The author has developed a simple and dependable circuit to generate the common dead time
在該方案中，設計了一種簡單可靠的pwm波公共死區的產生電路。 -
In the realization of the inverter control circuit, the frequency self - following system with optimal dead time based on dsp is researched
在逆變控制電路的實現中，研究了基於dsp的具有最佳死區的頻率跟隨控制系統。 -
In order to understand the mechanism of short - circuited deoxidization, an experiment was designed and performed for measuring the relation between the open circuit voltage of a deoxidization device and the process time
摘要為了解固體電解質脫氧的內部機理，對氧化鋯固體電解質電池短路脫氧過程中的外電路電壓隨時間的變化進行了研究。 -
In the next place, by studying the change of the resonant frequency of the whole system, this paper designs the circuit to track the resonant frequency of the system by cd4046 mainly. at the same time, in order to improve the efficiency and get better dynamic capability of the converter, we choose pll and fuzzy control after comparing the pll circuit, fuzzy circuit and pll ? fuzzy control circuit. in the end, this paper brings forward the control blue print to realize the drive control circuit of the high frequency converter, using the dsp chip as the key part to realize four routes of pwm drive pulses with dead band of the control system
其次，通過對整個系統諧振頻率變化的分析和研究，設計了以鎖相環cd4046為核心的鎖相環控制電路，同時，在綜合比較鎖相環控制、模糊控制以及模糊控制和鎖相環復合控制三種控制演算法的基礎上，進行了系統模擬，得出採用復合控制可使跟蹤電路既具有鎖相環路較好的穩態性能，又擁有模糊控制較好的動態性能，系統魯棒性能好，同時也提高了逆變器的效率。 -
This paper presents a method that chopping wave is done by switch devices which consist of three - level resistance regulating module and intelligence power module ipm, and which realizes constant - current discharge of storage battery. to achieve the intelligence control of the drive protection and the discharge process of ipm, the paper designs circuit formed by igbt threshold drive pulse pwm signals. ipm fault - blocking protection circuit and microcomputer 80c196. the devices can accurately control the 0 ~ 150a discharge current and the discharge time of the storage battery and calculate the releasing power
實現蓄電池恆流放電過程智能控制是蓄電池放電裝置發展的必然趨，本文提出了一種通過三極電阻調節模塊和由智能功率模塊ipm為開關器件進行斬波從而實現蓄電池恆流放電的方法。為達到對ipm的驅動保護和放電過程的智能控制，文中設計了igbt門極驅動脈沖pwm信號形成電路和ipm故障封鎖保護電路及由單片機80c196為核心的微機控制器。本裝置能夠對蓄電池進行0 150a放電電流及放電時間的精確控制及釋放容量的計算。 -
Monitor apparatus can measure valid value of three phase voltage and current, power factor, three phase disequilibrium, instant flecker of short time and harmonic without twenty, degree and harmonic distortion total. the paper are laid on the following. ( 1 ) master plan and function of circuit, ( 2 ) hardware design including circuit and principle of a / d conversion, phase lock, liquid crystal display and keystroke and so on, ( 3 ) design of system software including digital filtering, fft, a / d conversion and monitor interface of pc, ( 4 ) system test
監測儀能夠完成包括三相電壓、三相電流的有效值、功率因數、三相不平衡、電壓短期閃變、以及20次內的諧波、諧波相位、諧波失真總量等的測量。論文重點介紹了以下幾部分： （ 1 ）電路的總體設計和功能； （ 2 ）硬體設計，包括a d轉換、鎖相環、液晶顯示和按鍵輸入等原理和電路。 （ 3 ）系統軟體設計，包括a d轉換、 fft 、數字濾波等程序的原理和演算法以及上位機監控界面的設計； （ 4 ）系統測試。 -
This year ' s f1 schedule starts with tough back - to - back intercontinental flyaway races, with round two at the hot and humid sepang circuit in malaysia in just seven days time
今年f1的賽程以一個緊密的洲際背靠背比賽開始。 7天之後，比賽將來炎熱潮濕的馬來西亞雪邦賽道舉行。 -
In the sub block circuit design, the contents that the author had introduced include : the principle of band gap voltage reference and the design technique in low power supply ; the analysis of spike pulse noise rejection, frequency divider and dead time in oscillator and control circuit ; the selection of the width and length ratio of four switches and 2x / 1x mode change point in driver and mode selection circuits
在子電路設計中，作者比較深入分析的內容有:基準電路的原理及低電源電壓下基準電路的設計;振蕩器和控制電路中尖峰脈沖噪聲抑制、兩分頻電路及死區時間設定;驅動及模式選擇電路中開關管的寬長比的選擇及模式轉換點的設計。 -
One is based on vco, and the other is based on frequency divider. the advantages and disadvantages of them are discussed in the thesis. furthermore, a method of realizing dead time changeable circuit is given, which makes the designed driving circuit have more latitude when it is used
此外，論文還設計了兩種驅動信號產生電路，一種基於vco ，另一種基於振蕩器和分頻器，並對比了兩者的優缺點;給出了一種死區時間可變的電路實現方案，使所設計的驅動電路使用時具有更大的靈活性。 -
Approach to analysis of the circuit time field in rl series interrupt
串聯斷流電路時域分析的探討 -
Circuit time constant
迴路時定數 -
Automatic water - measuring meter is the combinative production of traditional method and present cmos integration circuit technology. it consists of water - level sensor and mainframe circuit. on the basis of analyzing its application, this paper gives the design of mainframe circuit, including time circuit, time - sequence circuit, input - interface circuit, switch circuit and power circuit
本文在分析cmos集成電路應用的基礎上，給出了自動量水儀表主機電路的設計，包括定時電路、時序電路、輸入介面電路、開關電路和電源電路的設計；其次，對水位傳感器進行了研究，分析了水位傳感器的工作原理、測量使用條件、動態特性、靜態特性以及水位傳感器的率定、標定方法。 -
The main ideas of the thesis and the contributions to the resonant dc - link area are also listed in this chapter. a novel control strategy for the two - amplitude actively clamped resonant dc - link is proposed in chapter ii. it neglects the bus short circuit time adjuster and stabilizes the clamping voltage by a pi regulator so that the obtained link frequency is improved and the link losses are greatly reduced
第二章針對雙幅控制技術在單相橋式電壓源逆變器中的應用為範例進行研究，提出了直流母線無短路控制和通過pi調節環穩定箝位電壓的雙幅諧振控制策略，進一步提高了母線振蕩頻率，減少了直流環節損耗。 -
It includes the design of trigger circuit, high speed clock circuit, a / d digital and data acquisition circuit, time inter - plug circuit and pci interface circuit 。 3. the function debug of hardware and the result analysis
主要包括觸發電路的設計、高速時鐘電路設計、 a / d數字化與數據採集電路設計、時間內插電路設計和pci總線介面設計。 3 .硬體功能調試及其結果分析。
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