common data bus 中文意思是什麼
common data bus
解釋
公共數據總線，通用數據總線-
Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo
本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。 -
Advantages of std bus and structure of pc / 104 bus are referred to design the user - bus, which uses three bus structures, i. e. address bus ( ab ), data bus ( db ) and control bus ( cb ). it is well compatible, and the applying system has flexibility and common use and is convenient to extent for users
該總線採用三總線結構，即地址總線（ ab ） 、數據總線（ db ）和控制總線（ cb ） ，具有良好的兼容性，從而使應用系統具有靈活性和通用性等特點，方便用戶對應用系統進行擴展。 -
It introduces that high - frequency data acquisition method bases on the common gpib bus. to data acquisition based on pc - daq, it makes theoretical analysis in signal - processing grounded signal source and measurement, data acquisition principle. avoiding pseudo - signal and multi data acquisition etc. .
一個完整的基於gpib總線介面系統主要由帶gpib介面的測試設備、 gpib卡以及電纜和計算機組成。在本章中介紹了基於gpib介面總線的特點，著重說明了gpib總線介面系統的原理和方法並給出了源代碼。 -
Addressing, common data bus
共數據總線尋址 -
Common data bus addressing
共數據總線尋址 -
Then, memory cell array and some parts of peripheral circuits used in sram, for example, sense amplifyier and adderss decoder, are designed and verifyied by simulation. furthermore, some novel methods, such as clocked hierarchical word decoding structure, multi - stage sense amplifyier, common data line and data bus equlibruim technology has been applied in the design of 128kbit and imbit sram. what ' s more, we have studied compiler technology applied in the designing course of a imbit full cmos sram from the pointview of methology
然後對sram的存儲單元電路以及外圍電路中的靈敏放大器和地址譯碼器進行了設計和模擬，在此基礎上，以128kb和1mb全cmossram設計為例，從方法學角度對同步sram設計中的帶時鐘分等級字線譯碼，多級靈敏放大和位線及總線平衡等技術進行了研究，並給出了相應的compiler演算法。
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