compiler level 中文意思是什麼
compiler level
解釋
編譯級-
According to the program structure of ansi c, some syntax - tree - nodes are designed in front - end, including function, block, data structure, type, expression, identifier and so on. syntax tree is divided into three levels, namely program level, function level and block level, which are useful for analysis of syntax and semantic in compiler as well as transferring syntax tree into rtl. retargetable compiler mainly includes intermediate representation, machine description and interface technique between compiler and machine description
編譯前端的實現技術包括詞法分析、語法語義分析和中間代碼生成技術等，針對ansic的程序結構，分別設計了函數、塊、數據結構、類型、表達式、標識符等語法樹結點，並將語法樹分成編譯層次、函數聲明和塊三個不同層次，使語法樹具有清晰的層次結構，有利於編譯程序的語法和語義分析，以及從語法樹到rtl中間表示的轉換。 -
The design of this chip sticks to the general methodology of hdl design. lt is entered in hdl format with innoveda ' s visual hdl and simulated with modelsim simulator, after synthesized with fpga compiler ii, the edif is entered in quartus ii, which is supplied by altera corporation to place and route. the sdo file produced by quartus ii is backannotated to the netlists and timing - simulation is been done. the success of this cryptogrammic chip also shows the effectiveness and advantage of the methodology of high level design with hdl
在innoveda的visualhdl設計平臺上用hdl語言完成了設計輸入，使用modelsim模擬器完成了功能模擬，使用synopsys的fpgacompiler進行了基於alterafpga庫的網表綜合，最後將edif網表輸入altera的布局布線工具quartus中進行了布局布線，將生成的sdo文件反標到modelsim模擬器中進行了時序模擬，該設計的成功，再一次表明了hdl設計方法的正確性和有效性。 -
Of an inner level, the compiler signals an error
語句，編譯器將發出錯誤信號。不過，僅當在所有 -
Based on these two factors mentioned above and the difficulty to implement in c compiler, this paper proposed a method of modifying operand type by inserting instruction lw or sw at assemble level as well as instruction scheduling. therefore, this can generate effective parallel instructions and correspondingly improve the performance and density of object code
本文在分析了上述兩個限制并行指令生成的主要因素以及很難在編譯器中實現并行指令生成的基礎上，提出了在匯編級檢查指令的操作數類型，通過插入lw或sw指令來改變操作數類型及指令調度的方法，能夠有效的生成并行指令，提高了代碼運行效率和代碼密度。 -
Demands placed on the assembly or non - private variable level will not produce a compiler warning
針對程序集或非私有變量級別的要求將不會產生編譯器警告。 -
Specifies the level to display for compiler warnings
指定編譯器警告的顯示等級。 -
A value specifying the compiler warning level
一個值，指定編譯器警告等級。 -
Specifies the warning level for the compiler to display
指定編譯器要顯示的警告等級。 -
Option specifies the warning level for the compiler to display
選項指定編譯器要顯示的警告等級。 -
Gets the compiler warning level
獲取編譯器警告等級。 -
To specify the level of warnings that you want the compiler to display
可指定您希望編譯器顯示的警告等級。 -
Dealing with reentrancy at the compiler level
在編譯器層次處理可重用性 -
This declspec is a promise to the compiler, and if the function references globals or second - level indirections of pointer arguments then the compiler may generate code that breaks the application
此declspec是對編譯器的一個承諾，如果該函數引用全局變量或第二層間接指針參數，則編譯器會生成將中斷應用程序的代碼。 -
In addition, the sample demonstrates direct manipulation of a dib surface, as well as using higher - level compiler support for mmx and sse2 integer instructions to optimize bitmap manipulation without writing assembler code
另外，此示例闡釋了直接的dib圖面操作，以及如何使用對mmx和sse2整數指令的更高級別的編譯器支持，來優化位圖操作而不必編寫匯編程序代碼。 -
Specifies the highest level of warning generated by the compiler
指定編譯器生成的警告的最高等級。 -
Learn assembly code, check how compiler generates code, learn how virtual function works, learn to debug at assembly code level
了解匯編代碼，檢查編譯器是如何產生代碼的，了解虛函數是如何工作的，學習在匯編代碼一級調試程序。 -
Lastly the mono jit just in time compiler is speedy, providing all these benefits at a reasonable performance level
最後， mono jit （ just in time ）編譯器速度很快，在適當的性能水準的基礎上提供了所有這些好處。 -
Discusses dealing with reentrancy at the compiler level
討論了在編譯器層次上對可重入性的處理。 -
An approach similar to practice 4, above, can be implemented at the compiler level
可以在編譯器層實現類似於前面經驗4的方法。 -
I would like to propose a model for dealing with reentrant functions at the compiler level
我將提出一個在編譯器層次處理可重入函數的模型。
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