control logic circuit 中文意思是什麼

control logic circuit 解釋
控制邏輯電路
  • control : n 1 支配,管理,管制,統制,控制;監督。2 抑制(力);壓制,節制,拘束;【農業】防治。3 檢查;核...
  • logic : n. 1. 邏輯,理論學。2. 推理[方法];邏輯性,條理性。3. 威力,壓力,強制(力)。
  • circuit : n 1 (某一范圍的)周邊一圈;巡迴,周遊;巡迴路線[區域];迂路。2 巡迴審判(區);巡迴律師會。3 【...
  1. This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga

    本課題主要針對星載并行計算機體系結構及軟體結構的特點,從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統級容錯模型研究,提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究,提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略,同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術,提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案,實現該方案所需增加的電路少,可避免板級晶元以及fpga晶元內部任何邏輯發生單點故障。
  2. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中,本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信,同時系統電路配置成中斷響應方式,這樣既滿足了系統要求,又充分利用了tms320f2812的硬體資源。在軟體設計中,本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  3. Superior frequency characteristics shortest recovery time, realize the switching of the circuit, complete functions such as open and close, clip wave, wave detector, high - frequency rectifier, logic control, which fit for all kinds of digital circuits and analog circuits

    具有良好的高頻開關特性反向恢復時間短,可實現對電路開和關的控制功能,可完成開關限幅檢波高頻整流邏輯控制等功能,適用於各類數位電路類比電路。
  4. The hardware in this system includes a digital signal processor, an analogy input channel, a lcd, an analogy output path, a keyboard input part, a guard circuit and a logic control circuit

    該系統硬體包括數字信號處理器晶元、前向輸入通道、液晶顯示器、模擬量輸出部分、鍵盤輸入部分、保護電路部分和邏輯控制部分。
  5. Implementation of programmable logic device in timing control circuit

    定時控制電器的可編程邏輯器件的實現
  6. Control logic circuit

    控制邏輯電路
  7. First, based on the analysis of the design method of two - valued shift counter, we use the multivaled circuit ' s property of high information density to put forward the design method of three - valued shift counter. by using this method module - n three - valued shift counter can be designed. and by selecting the best design method, the simplest circuit of control logic can be made

    首先,在分析二值的移位計數器的設計方法的基礎上,利用多值電路的高信息密度,提出了三值移位計數器的設計,運用該方法可以設計任意狀態的三值移位計數器,並且通過選擇最佳設計方案使控制邏輯電路最簡。
  8. The reactive power compensation is an important engineering in the power system. the active reactive power compensator designed in this text takes the instantaneous reactive power theory of three - phase as foundation, and is formed by the reactive current testing circuit, current tracking control circuit and the main circuit, and among them the current tracking control circuit is formed by instruction current arithmetic circuit, current polarity checkout circuit and current tracking control logic circuit three parts in the circuit form

    無功功率補償是電力系統中的一項重要工程,本文所設計的有源無功功率補償器是以三相瞬時無功功率理論為基礎的,它由無功電流檢測電路、電流跟蹤控制電路和主電路三大部分組成,其中電流跟蹤控制電路由指令電流運算電路、電流極性檢測電路和電流跟蹤控制邏輯電路三部分構成。
  9. The thesis analyses the problems on the noise of apd photoelectric receiving system. author designs apd laser signal receiving system circuits, front amplify circuit, controlling time - series logic circuits, dc / dc transform circuits. and takes apd bias voltage fuzzy control

    分析了apd光電接收系統的噪聲問題,並對apd激光信號接收系統電路、前置放大電路、控制時序邏輯電路、 dc / dc變換電路進行了設計,採取了apd偏壓模糊控制。
  10. Finally the module is accomplished successfully after installation and debugging. it mainly consists of the minimum system of dsp, a / d conversion circuit, cpld control logic, watchdog circuit, op amplifier and filter circuit

    該模塊主要由數字信號處理器最小系統、模數轉換電路、復雜可編程邏輯器件控制邏輯、看門狗電路、運算放大器電路和模擬濾波器電路構成。
  11. To reduce the size and increase the reliability of the control card, lattice company ? isplsi chip is used to realize the digital logic circuit. its insystem programmable ability makes it easy to realize the design of digital logic circuit

    6軸伺服控制卡上,使用lattice公司的isplsi器件實現數字邏輯電路設計,降低了板卡的設計尺寸,增加了電路板的可靠性和設計靈活性。
  12. In the hardware design, the analog circuit, high - speed a / d convertor, storage control logic and vxibus interface are discussed. the results of the simulation and analysis of the circuits are given

    在模塊的硬體電路設計部分中,著重對信號調理電路、高速a / d轉換器、高速存儲邏輯控制以及vxi總線介面等內容進行了討論,給出了具體的電路設計和關鍵器件的說明,並對部分模擬電路和數字電路進行了模擬分析。
  13. Tms320c5402dsp was used in the design to replace six scm those was used in the automatic biochemical analyzer now and to control system, cpld epm7128 offer logic circuit to the system. a 16 - bits high - speed a / d conversion device a / d976a replaced a / d574 to complete digital - analog conversion

    本系統設計中採用一片高性能的dsp (數字信號處理器) tms320c5402代替了目前生產的全自動生化分析儀的六個單片機完成系統控制,用可編程邏輯器件epm7128提供所需的邏輯信號,採用16位高速a d轉換器ad976a取代以往的ad574完成模數轉換。
  14. The control system includes two modules, one named the input module which acquires data digitally, and the other, named the output module, controls the emission of the laser, the gating function of the single photon counting module ( spcm ) and the synchronization of the input and output modules. each of them uses a complex programmable logic device ( cpld ) as the core component, and is devided into three parts : the hardware circuit, the programming logic circuit and the software

    該控制系統主要包括控制單光子發射、單光子探測器、數據採集接收系統的輸出系統和數據採集系統兩個模塊,它們都採用復雜可編程邏輯器件cpld作為核心功能晶元,由硬體電路設計、晶元編程和高級軟體編程三部分組成。
  15. The detailed functional modules consist of pci protocol conversion module 、 driver and magnifying module 、 control logic 、 clock circuit and configuration circuit

    具體的功能模塊包括pci協議轉換模塊、驅動放大模塊、控制邏輯、時鐘電路fifo電路和配置電路。
  16. In order to increase the stability of the system, decrease the area of the pcb ( printed circuit board ) and reduce cons - umption of power, control logic were integrated into a single chip by using fpga and cpld

    為提高系統的穩定性,減少pcb板面積,降低功耗,應用fpga , cpld器件將各種控制邏輯集成在一塊晶元上。
  17. Particularly set forth scm control circuit, principle and realization process of dc electromotor in creeping machine, the design of logic circuit and principle of interface card, the design of precise location installation, the choice of sensor, its principle and realization process, including the concrete process of realization by software

    詳細闡述了爬行器中直流電動機驅動裝置的單片機控制電路設計、工作原理及實現過程;介面卡邏輯電路的設計和工作原理;精確定位裝置的設計、傳感器的選用、工作原理,包括各項工作的具體軟體實現過程。
  18. The thesis includes the design of hard circuit, pcb ( printed circuit board ), driver and application soft involving a / d board and d / a board. the detailed functional modules consist of multiplex signals select module 、 analog digital conversion module 、 digital analog conversion module 、 pci protocol conversion module 、 driver and magnifying module 、 control logic 、 clock circuit and configuration circuit. the importance of the thesis is a / d board

    本課題包括硬體電路、印刷電路板( pcb ) 、驅動程序和應用軟體的設計,涉及a / d板和d / a板兩大塊部分,具體的功能模塊包括多路信號選擇模塊、模數轉換模塊、數模轉換模塊、 pci協議轉換模塊、驅動放大模塊、控制邏輯、時鐘電路和配置電路,其中重點是a / d板部分。
  19. Its driver control logic was realized by means of digital integrated circuit in which the pld chips utilized as the carrier. the vhdl, which is the ieee standard design language of integrated circuit, is used as the behavior description language. the compilation, synthesis, simulation and programming are fulfilled in the maxplusii

    設計的重點是驅動板,其驅動控制邏輯以pld晶元為載體通過數字集成電路方式實現,控制邏輯的功能設計是用ieee標準的集成電路設計語言vhdl作為行為描述語言,在maxplus武漢科技大學碩士學位論文環境中進行編譯、綜合、模擬和晶元編程。
  20. In the description of circuit design, the emphasis is paid the following hardware modules : ad / da inverter, dsp module, external program / data memory, cpld control logic, serial communication module, power module, and so on. problems and the corresponding solutions found in the design and debug stage are discussed, too. finally, the low - level software driver design is presented in detail, including system booting, initialization of dsp registers, cpld logic and timing control, drivers for asynchronous communication fifo, and drivers for ad converter

    在電路模塊分析中,重點介紹了語音的輸入放大和輸出緩沖部分、 ad da轉換、 dsp語音壓縮解壓、外部程序數據存儲器、 cpld邏輯控制、串列收發組件、電源供電以及dsp的jtag介面等等,並且給出了在硬體電路設計和調試過程中的問題與解決辦法。
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