control logic design 中文意思是什麼
control logic design
解釋
控制邏輯設計-
The thesis discusses on how to research and then design the led video panel system, which is a typical product of computer digital video system, by using the pld chip as the main control logic
本論文討論用pld晶元作為主要控制邏輯來設計計算機數字視頻系統的一個典型應用型產品? ? led視頻電子顯示屏系統的研製方法。 -
The thesis discussed in detail the hardware design, software development of the system and unknown spatial target active searching question etc. the control logic relation of all the station equipments can be divided into two stages
論文詳細討論了系統的硬體設計、軟體開發以及對空間未知目標的搜索等問題。全站設備的控制邏輯關系分為上下兩級，下級為直接過程式控制制級，上級為集中監督控制級。 -
Therefore, it can be named by “ the specific demultiplexer of sdh ”. the design of pos line card was discussed and we also have finished the control logic of the hardware platform of the specific demultiplexer
論文主要討論專用分接器的pos線卡設計和硬體平臺的控制邏輯電路設計與實現。論文首先對基於fpga的10gbps的pos線卡的設計方案進行了研究。 -
First, based on the analysis of the design method of two - valued shift counter, we use the multivaled circuit ' s property of high information density to put forward the design method of three - valued shift counter. by using this method module - n three - valued shift counter can be designed. and by selecting the best design method, the simplest circuit of control logic can be made
首先，在分析二值的移位計數器的設計方法的基礎上，利用多值電路的高信息密度，提出了三值移位計數器的設計，運用該方法可以設計任意狀態的三值移位計數器，並且通過選擇最佳設計方案使控制邏輯電路最簡。 -
This thesis focuses on the ingress process module of ctu, which translates c - 5 dcp format to rainier 4gs3. the specification analysis, architecture and logic design, functional simulation testbench design, synthesis report and testing result are discussed in this thesis. the research work mainly includes : the specification analysis and design requirements of ctu logic ; the architecture and logical design of ingress process module, which includes receive control fsm, send control fsm and cell position adjustment logic ; the performance improvement of ingress process module to receive and transmit data cell at the full line speed
本論文的主要研究工作包括：通信協議轉換邏輯的功能分析和設計需求；通信協議轉換邏輯上行方向的系統分析及體系結構設計，包括上行接收狀態機、發送狀態機、信元內位元組位置調整機制等的設計；通信協議轉換邏輯上行方向的線速設計，主要是上行接收的線速設計，要使用流水設計技術；提出了高速實現roundrobin調度策略的實現方法，並設計實現了桶式移位器和優先級編碼電路；應用bfm模擬模型設計了上行處理各模塊的模擬testbench ，完成了各級模塊的模塊模擬和系統集成模擬。 -
Programmable logic design on pci9054 local bus control
9054本地總線控制可編程邏輯設計 -
In this paper, we introduce the methods to test the tiny capacitors and analyse the principle of relaxation oscillator used in the readout circuits for silicon capacitive accelerometers. to form a complete relaxation oscillator, we design the current source 、 the switch 、 the control logic and the comparator
本文介紹了微小電容的各種測試方法，分析了採用弛張振蕩器進行測試的原理，並設計出了構成弛張振蕩器所需的電流源、電流開關、控制邏輯以及比較器。 -
In the hardware design, the analog circuit, high - speed a / d convertor, storage control logic and vxibus interface are discussed. the results of the simulation and analysis of the circuits are given
在模塊的硬體電路設計部分中，著重對信號調理電路、高速a / d轉換器、高速存儲邏輯控制以及vxi總線介面等內容進行了討論，給出了具體的電路設計和關鍵器件的說明，並對部分模擬電路和數字電路進行了模擬分析。 -
In the thesis, based on design and implementation of the two signal processing system of different requirement, multi - dsp processor structure, dsp - pci interface, system control logic, pci device driver program, user application program are researched. the main content is list as follows : 1 ) according to the lfmcw radar signal processing algorithm, a signal processing system based on pc104 - plus bus is developed
本文通過對以上兩種雷達信號處理機的設計開發過程，研究了採用多片dsp信號處理器組建并行處理模塊實現信號處理演算法的方法，利用pci總線實現處理機數據傳輸介面，設備驅動程序和控制界面軟體開發，實現信號處理機數據傳輸控制等幾個方面的內容，主要工作如下: 1 ）針對線性調頻連續波雷達信號處理演算法，完成了基於pc104 - plus總線的嵌入式信號處理板的設計、製作以及調試。 -
( 3 ) based on principle analysis and simulation, the main parameters are obtained. and the hardware solution is proposed - parallel processing system with multiple dsp. ( 4 ) the design of the software used to control logic and timing is presented
（ 4 ）在硬體設計的基礎上，提出了在本系統中實現時序和邏輯控制的軟體（不包括正交波束形成演算法的實現）設計方案（包括系統中斷系統的設計和系統的bootload設計） 。 -
As to the software, we firstly scheduled all of the test signal path between the computer and the uut, the output control logic between the digital i / o card and programmable relay key matrix, and used all of this to be the base of software design, then we introduce the block flow of software
在軟體設計部分首先規劃了所有測試信號在計算機主機與被測件之間的連接和傳輸路徑、數字i / o卡對可編程繼電器開關矩陣的輸出控制邏輯，作為軟體設計依據，隨后介紹了軟體的模塊化設計思想。 -
An idea is brought forth to design the total structure of the usb interface ip, the main control logic, the mcu interface ( the function is the same as the pdiusbd12 chip of the philips semiconductor ) and a dpll which is used to synchronize data and separate the clock. this paper also introduces packet recognition, transaction sequencing, sop, eop, reset, resume signal detection / generation, nrzi data encoding / decoding and bit - stuffing, crc generation and checking ( token and data ), packet id ( pid ) generation and checking / decoding,
提出設計了usb介面電路的整體構架，設計了usb的主要控制邏輯和與mcu的互連的介面（此介面與飛利普的usb介面晶元pdiusbd12兼容） ，也設計了一個數字鎖相環（ dpll ）來同步數據和分離時鐘，並對同步模式的識別、并行/串列轉換、位填充/解除填充、 crc校驗/產生、 pid校驗/產生、地址識別和握手評估/產生做了具體的分析。 -
The thesis includes the design of hard circuit, pcb ( printed circuit board ), driver and application soft involving a / d board and d / a board. the detailed functional modules consist of multiplex signals select module 、 analog digital conversion module 、 digital analog conversion module 、 pci protocol conversion module 、 driver and magnifying module 、 control logic 、 clock circuit and configuration circuit. the importance of the thesis is a / d board
本課題包括硬體電路、印刷電路板（ pcb ） 、驅動程序和應用軟體的設計，涉及a / d板和d / a板兩大塊部分，具體的功能模塊包括多路信號選擇模塊、模數轉換模塊、數模轉換模塊、 pci協議轉換模塊、驅動放大模塊、控制邏輯、時鐘電路和配置電路，其中重點是a / d板部分。 -
By using veriolg hdl and a top - down design model, a tap control logic was designed, which could reduce some dsp ’ s work
利用veriloghdl語言，採用自頂向下的方法實現了測試存取通道（ tap ）的控制邏輯，降低了dsp的設計難度。 -
But, for the part of control logic design, there is no efficient enough tool to build a bridge between system engineer and ic engineer
但是對于控制邏輯部分的設計，目前還沒有比較高效的輔助工具來完成系統工程師和ic工程師之間的交接。 -
If there is such a tool, for the control logic designed in stateflow, the system engineer could provide the rtl description of the system to the ic engineer. thus, the work of programming in hdl will be omitted, and the ic engineer could have more time to the design coming - up
如果存在這樣的轉換工具，對于使用stateflow設計的控制邏輯部分，系統工程師可以直接向ic工程師提供系統的rtl描述，省去了ic工程師在硬體描述語言上的編程工作，使得他能夠將更多的精力放在後續的設計中。 -
Its driver control logic was realized by means of digital integrated circuit in which the pld chips utilized as the carrier. the vhdl, which is the ieee standard design language of integrated circuit, is used as the behavior description language. the compilation, synthesis, simulation and programming are fulfilled in the maxplusii
設計的重點是驅動板，其驅動控制邏輯以pld晶元為載體通過數字集成電路方式實現，控制邏輯的功能設計是用ieee標準的集成電路設計語言vhdl作為行為描述語言，在maxplus武漢科技大學碩士學位論文環境中進行編譯、綜合、模擬和晶元編程。 -
A novel strategy combined the fuzzy logic of linear multivariable feedback control to design a controller of statcom to meet the multi - objective demands of power systems is also proposed in this dissertation, and the controller is designed with this strategy, because of variational element, nonlinearity and multi - objective controlling demands of statcom, this paper designs the controller respectively aimed at continuous linear control for voltage maintaining, oscillation damping, improving the transient stability
根據電力系統變參數、非線性以及對控制要求多目標的特點，本文針對維持系統節點電壓、阻尼系統振蕩、提高系統暫態穩定性能等不同控制目標分別設計了控制器，然後將模糊邏輯和多狀態線性反饋相結合，提出了一種能滿足電力系統多目標要求的控制方法，並用該控制方法為statcom設計了控制器。 -
In the description of circuit design, the emphasis is paid the following hardware modules : ad / da inverter, dsp module, external program / data memory, cpld control logic, serial communication module, power module, and so on. problems and the corresponding solutions found in the design and debug stage are discussed, too. finally, the low - level software driver design is presented in detail, including system booting, initialization of dsp registers, cpld logic and timing control, drivers for asynchronous communication fifo, and drivers for ad converter
在電路模塊分析中，重點介紹了語音的輸入放大和輸出緩沖部分、 ad da轉換、 dsp語音壓縮解壓、外部程序數據存儲器、 cpld邏輯控制、串列收發組件、電源供電以及dsp的jtag介面等等，並且給出了在硬體電路設計和調試過程中的問題與解決辦法。 -
Pipelining and parallel technology, accompanying with fast fifo as cache memory, instead of direct program operation, are adopted in the scheme and increase the transmitting speed dramatically ; fpga ( field programmable gate array ) is applied to realize the complex control logic of the system and makes it integrative, flexible and fast ; 386ex based embedded system, along with vxworks real - time operating system is introduced to substitute the microcontroller based system to simplify the hardware design and enhance the overall performance of ssr, and will make the system more easier to be applied to the projects in the future
該設計方案採用了流水線和并行技術，配以快速fifo緩存的方式取代了直接對flash進行編程的方式，極大地提高了閃存晶元存儲數據的速率；採用fpga技術實現系統的主要控制邏輯，集成度高、靈活性好、速度快；採用基於386ex的嵌入式系統及基於vxworks的嵌入式實時操作系統，取代單片機系統及其編程，提高了系統的整體性能，減輕了硬體設計的負擔，且使系統研發的延續性好。
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