control timing signal 中文意思是什麼

control timing signal 解釋
控制定時信號
  • control : n 1 支配,管理,管制,統制,控制;監督。2 抑制(力);壓制,節制,拘束;【農業】防治。3 檢查;核...
  • timing : n. 1. 時間選擇。2. 定時,校時,計時,調速。3. 【自動化】同步;時限。
  • signal : n 1 信號,暗號;信號器。2 動機,導火線 (for)。3 預兆,徵象。adj 1 暗號的,作信號用的。2 顯著的...
  1. Pre - data gathering module achieves the collection and communication of sixteen - route temperature signal. speed measuring and controlling module realizes the control of refolw soldering transfer speed by manipulating transducer. on - off outputting module fulfills calefaction control of calefaction tube by solid state relay. above position operator software programs by delphi, and realizes pid parameter automatic timing and no - oversnooting temperature control. software has friendly interface, convenient operation, complete functions

    前置數據採集模塊完成16路溫度信號的採集和通訊;速度測量模塊與速度控制模塊通過控制變頻器來調節迴流焊的傳輸速度;開關量輸出模塊通過固態繼電器對加熱管進行控制;上位機軟體採用delphi編程,實現了pid參數自整定以及無超調的溫度控制。
  2. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制;視頻數據幀存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號; d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用: i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  3. This paper introduces common background knowledge of intersection, mainly describes traffic control design principle, such as signal timing and lane channelization. it also summarizes the same point between signal timing and lane channelization in nature and illustrates that it is optimal cycle length and signal phase that is the critical part of signal timing

    =本文介紹了交叉口的一般背景知識,重點闡述了平面信號交叉口的交通控制的設置原理,包括信號配時原理和路口渠化原理,概括了信號配時和路口渠化原理的本質相同點。
  4. The controllable ability of valve timing, duration, and lift in the haecvvs has been proved. the map of common rail pressure, duration of control signal and the peak lift, the map of common rail pressure, duration of control signal and valve event duration, the map of the combination ability of valve event duration and valve peak lift etc. have been obtained from the experiment

    在研究了電控可變氣門系統氣門正時、氣門開啟持續期、氣門升程的可控性的基礎上,整理了共軌壓力、控制信號持續時間與氣門峰值升程的map圖,共軌壓力、控制信號與氣門開啟持續期的map圖,氣門升程與氣門開啟持續期配合范圍map圖。
  5. This logic is designed containing input signal delay, event type classification, event pre - scaling and timing logic and works in pipeline mode under control of 20mhz clock which ensures no dead time contribution

    主觸發邏輯在20m時鐘下以流水線的方式工作,保證沒有死時間的產生。第二個例子是任意數字信號發生器的設計。
  6. The concept of " timing " in the article is not the clock in our ordinary living, but syntheses which is made up of some frequency source in the signal generator ( such as cs atom frequency standard, rb clock & high accuracy quartz crystal oscillator ) which produces the primary frequency, the matching input interface and the matching output interface and controlling circuit etc. for example, bits is a kind of timing equipment, which is used to control the timing of some functions

    本文論及的「時鐘」概念不是指日常生活中使用的鐘表,而是由產生基準頻率的信號發生器(如銫原子頻率標準、銣鐘及高精度石英晶體振蕩器等)中的某種頻率源以及相配套的輸入、輸出介面和控制電路等組成的一整套具有特定同步定時功能的綜合體。如bits就是一種時鐘設備,它提供用在通信系統中控制某些功能的定時的時間基準設備,時鐘提供的信號稱為基準信號、定時信號或同步信號。
  7. The broadband signal is generated by high speed d / a, and the logical control of the system such as the interface timing control of ide or sdram is implemented by fpgas

    採用高速d / a實現輸出信號的高寬帶,採用多片fpga完成整個系統的時序邏輯控制,比如ide介面時序的實現, sdram的操作等。
  8. To develop a new approach so as to realize music fountain control with high quality, this paper describes the control design for music fountain system based on the industry personal computer. pwm frequency conversion timing, preprocessing, predicting and compensating algorithm, and software signal control in advance are adopted, which realize color music spring control with high quality, provide a new advanced method for the control design of music spring

    本文採用pwm變頻調速、預處理、預測補償控制和基於數據庫的軟體信號提前控制方法,提出了一種新的先進的音樂噴泉設計方案和控制途徑,並與傳統設計方案進行了分析比較,用面向對象的編程方法完成了對當今較為流行的mp3音頻格式的解碼,同時實時提取了音頻信號。
  9. This product acquires engine crank corresponding phase signal and rotating speed signal, which after ecu treatment, are used together with signals collected from other load sensor ( such as shutter location sensor ) to achieve electronic control over engine ignition timing. compared with mechanical ignition timing control, this is more precise and reliable, resulting in optimized performance of engine in oil consumption, exhaust, output and torque

    Fdw465b型電噴分電器總成採集發動機曲軸相位信號及轉速信號,同其它負荷傳感器(如節氣門傳感器等)採集到的信號,經電控單元ecu計算處理后,實現對發動機點火正時的電子控制,較之機械式點火正時控制更加精確、可靠,使汽車發動機系統的綜合性能得到較大提高,特別是發動機的燃油消耗率、排放、輸出功率、扭矩等方面都得到較大優化。
  10. The computer mainly realizes the functions of long - range supervision and management and it includes : real time data communication, running state monitoring, history data save and print, error alarm, etc ; the industry computer system mainly compulish data acquisition and signal setting during the experiment and finish data storage and management ; the plc control system mainly accomplishes the on - off input and output, it accomplishes timing control, checks the status and carries the over - voltage and over - current protection ; except for acquiring experiment data, intelligent control instruments also have the function of errors diagnose and communication

    上位計算機的任務是實現遠程監測和管理,主要進行實時數據通信、運行狀態監視、歷史數據存儲與列印、故障報警等;下位工業控制計算機主要用於實驗數據採集和參數預置; plc控制系統主要完成開關量和部分模擬量的輸入輸出,實現系統運行的時序控制狀態巡檢和過載保護;智能監控儀器除獲取現場參數外,還具有故障之診斷和通信功能。
  11. This product acquires engine crank corresponding phase signal and rotating speed signal, which after ecu treatment, are used together with signals collected from other load sensor ( such as shutter location sensor ) to achieve electronic control over engine ignition timing, resulting in enhanced performance of engine in oil consumption, exhaust, output and torque

    該產品採集發動機曲軸相位信號及轉速信號,同其它負荷傳感器(如節氣門位置傳感器等)採集到的信號,經電控單元ecu處理后,實現對發動機點火正時的電子控制,使發動機系統的綜合性能得到較大提高(如發動機的燃油消耗率、排放、輸出功率、扭矩等) 。
  12. The thesis then introduces top - to - bottom schemes, which discuss the functional design of hdtv test pattern signal generator according to the tasks and platform of the system, and develops the function of subsystems. the thesis analyses the theory and mathematic model of hdtv test signal, and studies the signal generating scheme called single - fpga and multi - prom, and describes in detail its key modules such as configuration connecting, prom routing, control and switch timing design and so on. the single - fpga and multi - prom scheme increases the number of prom to reduce the degree of fpga demanded, thus

    論文分析了hdtv測試信號的原理及數理模型,提出了一種以單晶元多配置為特色的信號生成方案,並對該方案的配置連接、晶元選路、控制切換時序設計等關鍵模塊進行了詳細敘述,該方案以增加配置晶元數量來降低對主晶元要求,不但降低了產品成本,還使各測試信號的代碼編寫和產生相對獨立,有利於合理使用晶元資源,實現多種復雜的hdtv測試信號,縮短開發周期。
  13. Equipment that provides a time base used in a transmission system to control the timing of certain functions such as sampling and to control the duration of signal elements

    在傳輸系統中提供時間基準的裝置,用於控制某些功能(例如采樣)的定時和控制各種信號成分的持續時間。
  14. These parameters include bandwidth, carrier frequency, signal duration and signal repeat frequency. according to the parameters, we select the method direct reading the stored digital waveform to realize the waveform generation in the third part, the waveform generator system control including communication control, timing control and address generation is designed

    第二部分研究了線性調頻信號參數間的內在聯系,包括信號帶寬、中心頻率、持續時間及重復頻率等,設計了信號參數,並在前人研究的基礎上選擇了波形存儲直讀法作為信號產生方案。
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