coverage fault 中文意思是什麼

coverage fault 解釋
故障檢測范圍
  • coverage : n. 范圍，規模，總額；〈美國〉保險額；保證金，現金準備；〈美國〉（新聞）報導（范圍）；【植物；植物學】優勢度。 coverage diagram 【航空】搜索范圍。
  • fault : n 1 過失，過錯；罪過，責任。2 缺點，缺陷，瑕疵。3 （獵狗的）失去嗅跡。4 【電學】故障，誤差；漏電...
  1. The american argos satellite has done experiments on the primary anti - radiation measures of cots components, and has obtained valuable experiment datas. the software fault tolerance techniques sihft provide error detection coverage of over 99 %, attracted researchers ’ attention. the experiment has demonstrated that it ’ s possible to satisfy the requirement of space applications by software techniques without special hardwares

    其中，軟體容錯技術sihft （ softwareimplementedhardwarefaulttolerance ）達到了大於99 %的檢錯覆蓋率，引起了人們的關注。這項實驗說明了在不需要專用硬體的情況下，使用軟體技術也能達到航天應用的可靠性要求。
  2. Jx5 is a complex microprocessor, which contains cache, microcode rom, instruction prefetch unit, instruction decode unit, integer unit, mmx unit, floating point unit, page unit, bus unit, dp logic, apic and so on. it is very difficulty to test a such complicated microprocessor and receive anticipative fault coverage ratio. so, we must add dft in cpu ’ design

    Jx5微處理器是一款結構異常復雜的微處理器，它的內部包含有: cache 、微碼rom 、指令預取部件和動態分支預測部件、指令譯碼部件、整數部件、多媒體部件、浮點部件、分段和分頁部件、總線介面部件、雙處理器介面部件、可編程中斷控制部件等。
  3. In this paper we investigate and carry out boundary scan ^ internal scan and built - in self - test three dft technologies in the embedded microprocessor estarl and get satisfying result, the fault coverage is more than 96 %

    本文針對嵌入式微處理器estar1的結構特點，研究並實現了邊界掃描、內部全掃描和內建自測試三種可測性設計技術，取得了良好的效果，故障覆蓋率達到96以上。
  4. Since the system parameters faulty coverage ratio and maintenance ratio influence the system ' s reliability and security, we analyze them and find out they play an important role in the evaluation of fault - tolerant system

    通過分析得出系統的故障覆蓋率與維修率在容錯系統的評價過程中起到非常重要的作用。
  5. Based on the above conclusions about anti - erosive vegetation structure, the paper expounds the implication of anti - erosive vegetation by pointing out the fault of its current definitions, and it is considered that anti - erosive vegetation should aim at protecting soil from erosion and fixing active sands in the eroded areas, ground space fully occupied by plants, in general with close structure, especially with outstanding coverage close to ground by organic matter ( litter and / or biomass )

    在上述結論的基礎上，本文通過指出現有防蝕植被定義的缺陷，論述了其涵義，認為防蝕植被應當是在侵蝕地區，以防止土壤侵蝕或以固沙為目的，植物充分佔據地面空間，一般具緊密結構，或者顯著具有有機體（枯落物以及生物量）貼地面覆蓋特徵的植被。
  6. And, when coupled with functional testing, the fault coverage for the entire process is as good as or better than in - circuit testing alone

    加上功能測試，這個過程中檢測到的故障率要比單獨進行在線測試故障發現率大。
  7. Because most of the faults found at board test are manufacturing defects, fault coverage for mda tests is nearly as good as fault coverage for in - circuit tests

    因為在板級測試中發現的大部分故障都是生產缺陷，生產缺陷分析測試到的故障幾乎都可以覆蓋在線測試所發現的問題。
  8. These new methods adopt the circuit information contained in the power supply line current to realize the fault diagnosis. it can increase the fault coverage, reduce testing cost and improve the quality and reliability of ics

    它通過從電源電流信號中提取有效的信息來進行故障診斷，能夠提高故障覆蓋率，降低測試成本並提高集成電路產品的質量與可靠性。
  9. In this paper we use the bist in the testing of the ssrams in estarl according to the characteristics of the structure and get almost 100 % fault coverage

    本文針對estar1內部ssram的結構特點，實現了存儲器自測試，得到了將近100的故障覆蓋率。
  10. The transient power supply current ( iddt ) testing can detect some faults undetectable by any other test method, and increase fault coverage

    瞬態電流測試方法可以測試一些其他測試方法無法檢測的故障，進一步提高故障覆蓋率。
  11. Through the simulative experiments about iddq detecting bridge faults in cmos and bicmos circuits, the fault coverage of iddq can be estimated

    並對cmos電路與bicmos電路的橋接故障作了iddq檢測模擬實驗，分析了iddq檢測的故障覆蓋率。
  12. The results through evaluating the scheme show that under the condition of ensuring high fault coverage, the scheme not only decreases the number of the test vectors by applying an universal test set, but substantially thrifts the extra hardware overhead

    經過方案評估得出此方案在不降低故障檢測覆蓋率的情況下，既使用通用測試集，又減少測試矢量數，還大大節約了附加硬體開銷。
  13. Finally the design of rs decoder in this chip is described as an example of the hardware / software co - design based on asip, the construction and application of asip is also analyzed. the fourth chapter introduces the design flow using eda tools based on standard cell, then it presents the dft of this chip in detail which uses following techniques : full scan, bist and boundary scan to improve the fault coverage

    第四章，在對本晶元的基於標準單元eda設計流程進行了簡要說明基礎上，對本晶元採用的可測試性設計進行了詳細的分析和說明，本晶元中有機結合了多種可測試性設計技術：基於全掃描的方式、 bist測試技術、邊界掃描技術，保證了很高的測試故障覆蓋率。
  14. This paper discuss the possibilities and ways of fault diagnosis system of fan, and the intelligent tecnnology such as expert system is applied. the primary coverage as follows : firstly, analyzes the need, research status and development and task of fault diagnosis theory and technique. as fan is subject investigated, introduces the present status, the source and main cause of fault diagnosis of fan, also introduces vibration analysis of fan simply

    主要內容如下:首先分析了設備故障診斷技術的需求、國內外發展現狀和任務。以風機為研究對象，介紹了風機故障診斷的現狀、故障的來源及主要原因，並對其進行了簡要的振動分析，提出了風機狀態監測與故障診斷實施的具體環節和系統結構。
  15. The stuck - open fault is simulated concurrently using iddt testing with the test pattern pairs generated above. through detaching a pattern pair into two independent patterns, the stuck - at fault are simulated concurrently. simulation results show better fault coverage. the

    最後，針對iddt測試的可行性，我們通過利用pspice軟體對s208電路中的一些故障做了模擬，這些故障包括開路故障和延時故障。
  16. The dynamic power supply current ( iddt ) is a new window through which we can observe the switching activities in digital circuits. iddt testing methods make possible further increasing the fault coverage

    動態電流提供了一個觀測電路內部開關性能的新的窗口，動態電流測試方法為進一步提高故障覆蓋率提供了可能。
  17. Internal scan is advanced for the difficulty of fixing the state of sequential circuit, can be divided into full - scan and partial - scan. in this paper we use full - scan according to the real circumstance of estarl and get high fault coverage with very little impact on the circuit

    本文根據estar1的實際情況，設計實現了全掃描結構，既得到了較高的故障覆蓋率，又對電路的延遲和晶元面積影響很小（延遲時間增加0 . 3 ，晶元面積增加0 . 01 ） 。
  18. At present testing method based on current testing has become an important cmos digital integrated circuit testing method which has been accepted widely. in order to improve the fault coverage of the testing to meet the demands of people, the dynamic current ( iddt ) testing was proposed to detect some faults that cannot be detected by other testing methods in the middle 1990 ’ s

    90年代中期，人們提出了瞬態電流測試方法（ iddt ） ，以便發現一些其他測試方法所不能發現的故障，進一步從總體上提高測試的故障覆蓋率，滿足人們對高性能集成電路的需要。
  19. As an enhancement of these methods, current testing can increase the fault coverage and make higher the reliability of ics

    作為這些方法的一個補充，電流測試方法能夠提高故障的覆蓋率，提高產品的可靠性。
  20. The conclusion is that by using ant algorithm, the fault coverage about near half standard circuits is best ; and the generation speed is very higher than strategate ' s

    與現有測試生成器相比，基於螞蟻演算法的測試矢量生成結果中，有近一半的標準電路獲得了最高的故障覆蓋率；在生成速度方面遠高於strategate等演算法。
分享友人
分享到 Line

分享到臉書