detail bit 中文意思是什麼

detail bit 解釋
明細位元
  • detail : n 1 〈pl 〉 詳細；詳情。2 細目；瑣事，小事。3 【軍事】支隊；〈英國〉行動指令。4 詳圖，明細圖。5 ...
  • bit : n 1 少許，一點兒，一些；（食物的）一口，少量食物。 〈pl 〉 吃剩的食物；小片。2 〈口語〉一會兒，一...
  1. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。
  2. In this paper, based on the study of vga graphic displaying theory and the theory of synchronizing display between led large - screen display system and crt image, a method, bit plane addressing method which has good effect -. high ratio of performance to price and can be implemented easily in circuits is discussed. and the principle and the implementation of the multi - gray led display system with programmable logic devices cpld and fpga are analyzed in detail

    本文在分析vga圖象顯示原理和led大屏幕與crt視頻圖像同步顯示原理的基礎上，論述了一種顯示效果較好、性能價格比高、電路上易於實現的方法? ?位平面尋址法實現多灰度圖象，並詳細分析了應用復雜可編程邏輯器件cpld和在線可編程邏輯器件fpga實現多灰度彩色led大屏幕圖像顯示的原理及電路實現。
  3. In addition, the beamforming techniques for cdma systems are discussed emphatically. the algorithm based on code filtering is deduced in detail theoretically, and the performances such as convergence and bit error rate ( ber ) are simulated. meanwhile, we improve a decision - projected algorithm based on least - mean - square ( lms ) error

    論文重點討論了cdma系統的波束形成技術，在理論上詳盡地推導了基於擴頻碼濾波的波束形成演算法，對其收斂性、誤碼率等進行了計算機模擬；針對基於最小均方（ lms ）誤差的一種判決映射演算法進行了改進。
  4. Detail specification for electronic component. semiconductor integrated circuit. type ch2021 4 - bit up down synchronous binary counter dual clock

    電子元器件詳細規范.半導體集成電路ch2021型4位二進制同步加減計數器
  5. A new bit rate control strategy with both global pre - allocation and local segmentation ( glas ) for low bit rate application is proposed. first, it allots bit date to every frame in advance according to possessive rate of buffer, and then distribute different quantization parameters according conctete detail. by means of this method, buffer is controlled more particularly. and the quality of decoded image is improved, the traditional video image coding method, that is to say, the intraframe coding based on dct and the interframe prediction coding based on motion compensation, is not suitable for low bit rate compression and aside from this, the encoder is too complicated

    它首先在總體上根據緩存器的佔有率給每幀預分配比特數，然後再根據具體細節給予不同的量化參數。使緩存器得到了更細致的控制，解碼圖像的質量有所改善。針對傳統的視頻圖像編碼方法，即幀內基於dct的編碼加幀間基於運動補償的預測編碼存在不適于低比特率壓縮，編碼器復雜等不足，討論了基於3 - ddct的xyz視頻圖像壓縮編碼方法，提出了3 - ddct系數的三維「 z 」形掃描方案，大大提高了編碼效率。
  6. Based on the research and analysis of system structure of 10 - bit 100msps pipelined cmos adc, according to the system performance, the specifications of sub _ adc is obtained, while the sub _ adc including the preamplifier - latch comparator, the reference ladder resistance and the clock - control encode circuits are discussed in detail

    基於對10 - bit100mspspipelinedcmosadc系統結構的分析研究，結合系統性能確定了子adc的指標要求，詳細討論並設計了子adc單元模塊的設計，包括預放大鎖存比較器，參考電阻串和時鐘控制編碼電路。
  7. This paper researches basic principle of microwave digital phase shifter deeply, reviews different theories of all kinds of microwave digital phase shifter circuit, analyzes loaded - line phase shifter in detail and draws design curves according to formulas. and this paper presents a novel method, which makes use of modeling simulation that software - ansoft serenade 8. 7 provides to evaluate parameter values of pin diodes through s parameter measurement. then, a kind of 6 - bit digital phase shifter circuit is designed and simulated through software - ansoft serenade 8. 7

    本文對微波數字式移相器的基本理論進行了較深入的研究；綜述了各種微波數字式移相器電路的工作原理，著重對加載線式移相器電路進行了理論分析，並根據計算公式作出一系列相應設計曲線；提出利用軟體ansoftserenade8 . 7所提供的測量數據擬合功能，通過測量s參數來確定pin二極體等效電路參數的新穎實驗方法；利用微波電路設計軟體ansoftserenade8 . 7對6位數字式移相器電路進行模擬、優化設計，做出樣品，並對其性能測試分析，對研製微波數字式移相器具有重要的參考意義。
  8. Transformations are worth looking at in a bit more detail

    轉換值得我們做更進一步地探討。
  9. Hybrid integrated circuits detail specification for type hda030 linear 12 bit digital to analog converter

    混合集成電路. hda030型線性12位數字模擬轉換器詳細規范
  10. The technology of trellis coded modulation ( tcm ) and viterbi decoding which could achieve high transmitting rate at a low bit ' error rate are demonstrated in detail. and then the design and achievement of itu - t v. 32 modem that based on one - dimensional tcm are expatiated. the paper also discusses the multi - dimensional tcm the itu - t v. 34 modem that based on it and tcm ' s application in the carrier communication

    文中深入研究了可保證一定誤碼率的情況下能實現較高傳輸速率的網格編碼調制（ tcm ）技術和維特比譯碼技術，闡述了基於單維網格編碼調制的itu - tv . 32modem的設計和實現，討論了多維網格編碼調制技術和基於其的itu - tv . 34modem ，並對網格編碼調制在載波通信中的應用作了簡單介紹。
  11. Semiconductor integrated circuits. detail specification for type jc4585 of cmos 4 - bit magnitude comparator

    半導體集成電路. jc4585型cmos4位數值比較器詳細規范
  12. 2 ) appling the theory of information and code. this paper gives the code rule, detail code methods and decode principle of bit code and frame data code. also this paper researches and designs the lower power consumption and anti - jamming code at the signal source point

    2 ）將信息論和編碼理論應用於無線家庭安防系統中，給出了位碼編碼、幀數據編碼的編碼準則、具體編碼方法及解碼原理。研究並設計了信源端具有低功耗和抗干擾性能的最佳編碼方法。
  13. In this thesis, the characteristics of underwater acoustic channel were analyzed, the mcm technique and the lfm signal which were used in the multicarrier modulation high bit - rate underwater acoustic communication system was discussed in detail, the important parts in system designing were examined

    論文對水聲通道特性進行了分析，就多載波高速水聲通信系統中用到的多載波調制技術、線性調頻信號進行了詳細論述，論述了系統設計中的重要環節。
  14. What ' s the meaning of this sentence ? can you explain it in more detail ? you like it just because it is a bit hot, right

    指琴橋的那句話什麼意思?可否解釋下?是不是因為有點點辣才喜歡
  15. Make this season sweet and romantic with this pink cocktail dress. our tempting dress features a lovely laced and the sequined flower bust design. the butterfly bow detail is charming, while layered drape add a bit of daring style

    產品說明:穿著這件禮服使這個季節變的甜蜜而浪漫吧.我們又一次大膽的嘗試便是鑲嵌著碎花的胸部和亮片設計.蝴蝶結形狀的裝飾帶很迷人，多層次的下擺也是大膽的造型
  16. In this paper, we give a detail discussion on the key technology, including software and hardware designing of g. 729a multi - channel speech codec realtime implemention on a simple dsp processor - tms320c6202. in combination with the requirements of a military communication network, the atm adaptation solution of g. 729 coder bit stream is analyzed. a kind of new atm adaptation technology - aal2 is introduced. the analyse and research of aal2 are provided

    本文詳細討論了多路g . 729a語音編解碼器在一片dsp處理器tms320c6202上實時實現的軟硬體設計和關鍵技術。結合某軍事通信網設備的需要，進而對g . 729語音編碼的碼流的atm適配方案進行了分析。提出了用一種新的atm適配技術- - aal2進行適配的方案。
  17. In detail, they are bit - interleaved coded modulation ( with iterative decoding ), low - density parity - check codes and stf technology. by the performance analysis of bicm ( - id ), which can make code and modulation optimal separately, and achieve maximum possible coding diversity as well as modulation gain, guidelines for its design and an easy algorithm for siso are proposed. design of capacity - approaching of ldpc codes and efficient encoding of them as well as several kinds of its decoding algorithms are investigated

    具體的講，就是討論了基於比特交織的編碼調制技術，並給出了映射方式的設計準則以及核心模塊siso的一種簡單的f - map演算法；研究了編碼最小漢明距隨碼長線性增加的ldpc碼的幾個方面的問題，包括接近香農限碼子集的度分佈對的設計、有效編碼器的實現和各種譯碼演算法的優缺點，並對基於ldpc碼的bicm應用於ofdm傳輸系統中的性能進行了模擬。
  18. That is, after decoding ac3 bit stream by software, the models are set up for the key sub - functions to get the extended instructions of risc core and the key operation is mapped to special instructions. next, the detail hardware of extended instruction is given

    通過對ac3解碼匯編程序及其在virgo核上運行的結果進行分析提取出佔用cpu運行時間較多的子函數，再對這些子函數建立模型提取出關鍵操作並將其綜合成特殊指令，文中給出了這些指令的具體硬體實施框架和原理。
  19. Detail specification for electronic components. semiconductor integrated circuit ct54ls169 ct74ls169 4 - bit binary up down synchronous counter

    電子元器件詳細規范.半導體集成電路ct54ls169 ct74ls169型4位二進制同步加減計數器
  20. In the dissertation ， we discribe the implementation of large capability video data acquisition system based on pci bus of computer 。 the system is composed of data acquisiton card and corresponding software 。 the data acquisiton card include two acquisition channels ， 8 - bit digitization at rates up to 13. 5mhz 。 frist ， the architecture of the video data acqusition system is studied 。 then ， the function and implementation methode of each module are introduced in detail 。 the control module of the video data acqusition card is implemented by using of the isp technology of cpld and vhdl programming technology 。 the a / d converter used assembler to implement the initialazation programe 。 and the double buffer technology is used for large capability data acqusition. because a contiously large memory is difficult to apply in windows operating system 。 finally we use broland c + + to introduced the devleoping procedure of drivers 。

    在實際的研製過程中，利用cpld的在系統可編程（ isp ）技術和基於vhdl語言的可編程邏輯器件設計技術實現了視頻數據採集卡的控制模塊。在視頻的a / d轉換模塊，用匯編程序模擬i2c總線對初始化a / d轉換晶元。針對大容量數據採集，採用了雙緩沖技術解決wndows操作系統下難以申請到大容童連續內存的間題。
分享友人
分享到 Line

分享到臉書