gate digital 中文意思是什麼

gate digital 解釋
數字門
  • gate : n 1 大門,扉,籬笆門,門扇。2 閘門;城門;洞門;隘口,峽道。3 【冶金】澆注道,澆口,切口;【無線...
  • digital : adj. 1. 手指的;指狀的。2. 數字的,數據的。n. 1. (鋼琴等的)琴鍵。2. 手指。
  1. In this paper, research on the algorithm of complete digital if and baseband transmission system and the realization of transmitter and receiver. / 4 - dqpsk is chosen as digital modulation scheme. the scheme of demodulation is baseband differential detection. sliding correlator can realize the symbol synchronous acquisition ; early - late gate synchronizer is used to do symbol synchronous tracking

    系統的發射機選定/ 4 - dqpsk為調制方式,接收機採用基帶差分解調的非相干解調方式,滑動相關器捕獲發送的pn序列,早遲門同步器跟蹤符號同步,使用相關器對同步后的符號進行最佳判決,並在這些演算法實現的基礎上,實現了直接序列擴頻和解擴技術。
  2. In this paper, the method of digital evolvable hardware is studied based on the dynamical reconfiguration of field programmable gate array ( fpga ). in the paper, firstly, the basic conception and theory of ehw are roundly introduced and the structure characters of ehw chip are analyzed. secondly, the thought of standard evolutionary algorithm is discussed and the flow of improved evolutionary algorithms is analyzed

    本文首先較全面地介紹了硬體演化技術的基本概念和原理,分析了演化硬體晶元的結構特點;其次,討論了標準演化演算法的思想並對改進型演化演算法的流程進行了分析;然後著重分析了演化硬體實現中的關鍵技術,對其實現方案進行了深入的研究,文中分別採用外部演化和內部演化兩種方式對不同的應用電路進行了演化。
  3. A control pulse transmitted to a gate or other digital device to release data at a precise instant, usually by the cpu

    一種控制脈沖,通常由cpu在某個準確時間傳輸到門電路或其它數字設備以釋放數據。
  4. The tracking method of interference delay is studied and simulated. referring to late - early loop gate, a method that applies to this system is proposed. slight adjustment of delay difference is done by interpolation, so the whole digital structure is obtained

    以數字通信中的遲-早門環路為基礎,提出了適用於pcma系統的跟蹤環路,並且利用插值的方法實現了時延差的微調,得到全數字化的設計結構。
  5. Aiming at the problems in the field of the government for hydraulic turbine, this thesis applies the technology of programmable controller to the speed control of hydroelectric generators in hydropower station. a digital regulating system based on the fx2 programmable controller for the water - gate and paddle of hydraulic turbine is developed. first, the turbine regulating system is briefly introduced and the mathematics model of the system is derived

    本文針對當前我國水輪機調速器領域技術現狀,將可編程式控制制器技術應用於水電廠發電機組的轉速控制,提出了在應用可編程式控制制器實現導葉控制系統的基礎上,以可編程式控制制器實現導葉、輪葉雙調整控制系統,並參與研製了以fx2可編程式控制制器為核心的水輪機雙調節控制器,樣機的實際運行良好,系統的軟硬體設計得到驗證,結果令人滿意。
  6. The teaching difficulty of the course of digital circuit basis mainly focuses on some knowledge of components, for example, semiconductor basis, separation and integration logic gate circuits

    摘要《數字電路基礎》課程的教學難點主要集中在半導體基礎、分立和集成邏輯門電路等元器件知識部分。
  7. Sorting algorithm can solve logic gate circuit for more fanout, more loop nestification and feedback alternately. we sort these nodes according to their joint relationship by the sort algorithm that can determine the priority order of digital circuit simulation and give the feedback chain

    排序演算法可以解決具有多扇出、多迴路嵌套及交叉反饋的邏輯門電路,按照其連接關系進行排序,並給出其中的最大反饋鏈。
  8. E - gate is a smart card technology combining iso and usb ( universal serial bus ) versatility with leading - edge security functionality in a plug and play format, providing digital signatures, mutual authentication and encryption required for secure on - line transactions

    E - gate乃結合iso及usb技術的熱插式智能卡數據安全平臺,為在線交易提供所需的電子簽字、身份確認及數據加密等功能。
  9. Motorization system for satellite tv reception, such as, diseqc h - h mount, diseqc / digital positioner, dish actuators, bed / chair actuator with controller, long distance remote gate opening system and synchronized window opening system are our main products

    我們有堅實的研發團隊和最具競爭的製造能力,專精於各種電控床、電控椅的升降推桿及控制器、衛星天線驅動器及其定位控制器、遠距離遙控安全開門驅動器、遙控多桿同步消防開窗機。
  10. In this dissertation, the method to design and realize the digital receiver in the field programmable gate array ( fpga ) has been discussed ; combining coordinate rotation digital compute ( cordic ) to design nco, we get a efficient structure without multiplications

    本論文正是運用現場可編成邏輯器件( fpga )設計與實現數字接收機問題開展研究,結合坐標旋轉數值計算( cordic )演算法實現數控振蕩器( nco ) ,得到一種免乘法器高效可移植性好的數字接收機fpga實現結構,並在現有的硬體平臺上進行了接收機系統的調試,測試結果表明該接收機能夠達到系統指標要求。
  11. For the high - speed digital signal processing, the structure of fpga and dsp is widespreadly adopted. dsp is more featured in the implementation of complicated algorithm, while field programming gate array ( fpga ) shows more advantage in its flexibility of design, simplicity of system configuration, modification and maintenance. in the paper, the hardware system of the spaceborne radar is based on the structure of fpga and dsp, of which the signal processing part is accomplished with one fpga chip and multi dsps

    Dsp適合完成結構復雜的演算法;現場可編程邏輯陣列( fpga )適合完成高效、演算法固定的任務;與專用集成電路( asic )相比, fpga優點主要在於其很強的靈活性、可在線配置、修改和維護方便等優點。本文工程中的星載雷達信號處理和控制系統就是採用dsp + fpga的方式。其中信號處理採用的是xilinx公司的virtex -和virtex系列fpga和多片analogdevices公司的tigersharcts101的硬體電路結構。
  12. The main contents of the paper are : i the relationship of the accurateness of calculation, complexity of calculation and hardware resources of the 5 - 3 dwt ; ii the basic theory of pci data transmission the controlling of the host to client and the data exchanging ; iii configuration of the video decoder saa7114h to implement the transformation of the analog to the digital image ; iv image acquisition, compression and transmission from the host to the acquisition board by the component of field programmable gate array ( fpga ), digital signal processor ( dsp ) with the controller of pci and video decoder saa7114h

    Pci的數據傳輸原理,外部主機如何控制從屬設備以及如何進行數據交換。配置視頻解碼器saa7114h ,實現模擬ccd攝像頭模擬數據到數字數據的轉換,實現採集的功能。用fpga 、 saa7114h和集成pci介面的dsp實現圖像的採集、壓縮以及從採集板到主機的傳輸。
  13. A good digital library should be able to communicate with the world outside and to develop itself as well ; this is exactly the new rule set by the author to evaluate digital libraries. during the last ten years " evolution of digital libraries, a lot of digital library architectures have been worked out. they include k - w architecture which is well known for its " handle system ", dienst architecture which uses " collection " to search information, infobus architecture which extends its services from the bottom to top, warwick framework which introduces the idea of " container ", fedora architecture which resorts to " content type " to solve interoperability issue, and oai architecture which uses " filtering gate " to solve the same problem

    數字圖書館事業的興起已經有了近10年,在這段期間,研究人員們設計出了不少優秀的數字圖書館體系結構,其中包括以「調度系統( handlesystem ) 」而著名的k - w體系模型、利用「類聚合體( collection ) 」來幫助尋找信息的dienst體系模型、自底向上分層次擴展服務的infobus體系模型、利用「容器」思想的warwick框架、引入「內容類型」解決互操作性問題的fedora模型、以及用「過濾性關口」解決互操作性問題的oai ( openarehivesinitiative )框架,這些模型在解決互操作性和可擴展性兩大難題時各有特點,但是他們也都存在著一定的不足之處。
  14. To check the digital signature of a file, right click on its icon, select properties from the pop up menu, and select the digital signatures tab. you should see a signature by " the world gate, inc "

    驗證數字簽名的方法是:在一臺xp 2000 me電腦上右擊文件,選擇其"屬性"菜單,然後在彈出的窗口內選擇"數字簽名"頁。
  15. We are a distributor with offices in botn england and ireland for the past fifteen years, we are looking for expand our product range. we are interested in the following products. gate operators, door, operators, remote controls, safety cells, digital key pads, proximity readers, intercoms

    我們在英格蘭和愛爾蘭都有分公司,我們公司成立15年,尋找濾清器跟一些汽車安全裝置,請供應商盡快聯系我們。
  16. Base on the theory analysis of the superconducting rsfq digital circuit model, wrspice is used to do time domain simulation of superconducting rsfq digital circuit in this paper, and superconducting jtl, buffer, rs flip - flop, t flip - flop, and or gate are acquired

    在超導rsfq數字電路模型的理論分析基礎上,論文中採用wrspice對超導rsfq數字電路進行時域模擬,得到了超導jtl傳輸線,緩沖器, rs觸發器, t觸發器,或門等基本邏輯單元電路以及電路參數。
  17. 2. by analyzing the partial discharge signals and the interferences and using high - speed filed programmable gate array ( fpga ) and digital signal processor ( dsp ), a hardware and print circuit board have been designed 3

    2 )通過對局部放電和干擾的分析,針對局部放電信號實時處理的要求,利用高速的現場可編程邏輯器件和數字信號處理器完成了信號處理的硬體電路板的設計與製作。
  18. Have you got top quality ( just made with digital camera ) photos to extend them to banner shields sizes as howo advertisements over the company ' s gate

    你有數碼相機拍的高質量的相片嗎?質量好到要能放大到和廠門口掛的howo廣告牌的那般尺寸大小(還能夠看清楚的程度) ,這樣就可以把它們拿去用作標語橫幅了。
  19. A distinguishable faults test generation method for digital circuits is presented. the features of basic gate circuits and neural networks are used to establish the test model, and to generate the test patterns for given faults. the fault model and constrained circuit are studied. some strategies, e. g, the reduction of the size of neural network, are proposed in order to accelerate test generation process. the experimental results demonstrate that the algorithm proposed in the paper is effective

    研究一種基於人工神經網路的能區分故障的數字電路測試生成方法,該方法利用電路基本邏輯門的特性和神經網路模型的特點,首先建立測試生成的神經網路模型,然後通過求解網路能量函數的最小值點獲得給定類型故障的測試矢量,其研究結果在可區分故障的測試生成方面提供了一種可能的新途徑
  20. In this paper, a precise cmos bandgap voltage reference which uses the difference of mos source - gate voltage to perform efficient curvature compensation is described in detail, which is compatible with standard digital cmos process

    論文詳細描述了一個運用標準數字cmos工藝實現的、採用mos管的柵源電壓差進行有效的溫度曲率補償的帶隙基準電壓源電路的設計。
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